Verifying Arithmetic Hardware In Higher-order Logic

Theorem-based design uses logical inference rather than simulation to determine or verify the proper- ties of design implementations. The initial effort to make such an approach practical is large when com- pared to conventional simulation. However, the cost of this effort is typically incurred only once. The hardware descriptions are parameterized so that the verification results are applicable to an entire set of designs rather than just one instantiation. To illustrate these ideas, the logical structure used to verify arithmetic hardware in HOL is outlined. In particular, the role of data abstrac- tion, recursion, and induction is shown.