内置采样时钟发生器的片上100ghz采样率8通道采样示波器

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.992996

M. Takamiya, M. Mizuno, K. Nakamura

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引用次数: 91

摘要

用于信号完整性检查的片上8通道采样示波器宏使用0.13 /spl mu/m CMOS工艺。它包含用于100GHz采样的相位插值采样时钟发生器，电荷共享采样头和用于抗噪声测量的容静电去耦电容器。

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An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator

An on-chip 8-channel sampling oscilloscope macro for signal integrity checking uses a 0.13 /spl mu/m CMOS process. It contains a phase-interpolated sampling clock generator for 100GHz sampling, charge-sharing sampling heads, and ESD-tolerant decoupling capacitors for noise-immune measurement.

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2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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