A. Shima, H. Ashihara, T. Mine, Y. Goto, M. Horiuchi, Y. Wang, S. Talwar, A. Hiraiwa
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Self-limiting laser thermal process for ultra-shallow junction formation of 50-nm gate CMOS
We have developed a novel LTP (laser thermal process) that dramatically enhances the laser exposure window by controlling the heating process in a self-limiting way (SL-LTP). The Vth roll-offs of MOSFETs formed by this method were remarkably improved compared to those by RTA when offset-spacer and halo-implantation processes were not applied. Its effectiveness was also verified in 50-nm gate CMOS devices for the first time by confirming that the drain current increased with laser fluence beyond the conventional exposure limit.
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