Nonlinear analysis of phase-lock loop in coherent communication system

A phase-lock loop is essentially an optimum nonlinear phase estimator, so that it can reduce the noise to a minimum, and recover the signal. Input noise can cause output phase trembling in the loop and affect its synchronization and tracking properties. It can even cause cycle skips. According to the analysis and simulation results, the probability density of random phase is the approximately Gaussian distribution, and the shape of the curve becomes sharper with increasing the signal noise ratio. One can evaluate the property of a phase-lock loop by its mean time of cycle skips. The relation between the mean time of cycle skips T/sub av/ and the input signal noise ratio (SNR)/sub L/ is an exponential function. The mean time of cycle skips increases, the number of cycle skips decreases, and the probability of unlocking decreases with increasing signal noise ratio.<>