{"title":"可编程逻辑的单输出功能","authors":"I. Voyiatzis, C. Efstathiou, C. Sgouropoulou","doi":"10.1109/DTIS.2018.8368581","DOIUrl":null,"url":null,"abstract":"Single output functions have gained attention due to the popularity of FPGAs that implement complicated circuits based on Look-Up Tables (LUTs). LUTs implement single-output modules using multiplexer-based designs. In this work we present a scheme for the implementation of programmable single output functions. The proposed design can be utilized to implement LUTs with lower overhead compared to traditional designs with gate-based multiplexers.","PeriodicalId":328650,"journal":{"name":"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Programmable logic for single-output functions\",\"authors\":\"I. Voyiatzis, C. Efstathiou, C. Sgouropoulou\",\"doi\":\"10.1109/DTIS.2018.8368581\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Single output functions have gained attention due to the popularity of FPGAs that implement complicated circuits based on Look-Up Tables (LUTs). LUTs implement single-output modules using multiplexer-based designs. In this work we present a scheme for the implementation of programmable single output functions. The proposed design can be utilized to implement LUTs with lower overhead compared to traditional designs with gate-based multiplexers.\",\"PeriodicalId\":328650,\"journal\":{\"name\":\"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2018.8368581\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2018.8368581","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Single output functions have gained attention due to the popularity of FPGAs that implement complicated circuits based on Look-Up Tables (LUTs). LUTs implement single-output modules using multiplexer-based designs. In this work we present a scheme for the implementation of programmable single output functions. The proposed design can be utilized to implement LUTs with lower overhead compared to traditional designs with gate-based multiplexers.