快速原型的电信组件使用一个可合成的VHDL灵活的库

E. Domenis, E. Filippi, L. Licciardi, M. Paolini, M. Turolla, D. Rouquier
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引用次数: 2

摘要

提出了一种灵活的综合库,用于电信应用的VLSI电路快速、安全的原型设计。库模块用VHDL语言描述,可移植到不同的CAD框架中,便于IC和系统设计人员使用。采用泛型参数规划实现模块灵活性;映射可以在fpga,半定制和基于单元的CMOS库上完成。模块可以达到几千门的大小和目标频率为40兆赫兹的CMOS半导体定制设计。最后详细介绍了作为方法学测试载体的VLSI MPEG1音频解码器的开发。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fast prototyping for telecom components using a synthesizeable VHDL flexible library
A flexible synthesis library for fast and safe prototyping of VLSI circuits for telecom applications is presented. Library modules are described in VHDL so as to be portable in different CAD frameworks and easily usable by IC and system designers. Module flexibility is achieved by using generic parameter programming; mapping can be done on FPGAs, semicustom and cell based CMOS libraries. Modules can reach several thousand gates in size and a target frequency of 40 MHz for a CMOS semicustom design. A VLSI MPEG1 audio decoder developed as a methodology test vehicle is finally detailed.
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