E. Domenis, E. Filippi, L. Licciardi, M. Paolini, M. Turolla, D. Rouquier
{"title":"快速原型的电信组件使用一个可合成的VHDL灵活的库","authors":"E. Domenis, E. Filippi, L. Licciardi, M. Paolini, M. Turolla, D. Rouquier","doi":"10.1109/ASPDAC.1995.486403","DOIUrl":null,"url":null,"abstract":"A flexible synthesis library for fast and safe prototyping of VLSI circuits for telecom applications is presented. Library modules are described in VHDL so as to be portable in different CAD frameworks and easily usable by IC and system designers. Module flexibility is achieved by using generic parameter programming; mapping can be done on FPGAs, semicustom and cell based CMOS libraries. Modules can reach several thousand gates in size and a target frequency of 40 MHz for a CMOS semicustom design. A VLSI MPEG1 audio decoder developed as a methodology test vehicle is finally detailed.","PeriodicalId":119232,"journal":{"name":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","volume":"300 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Fast prototyping for telecom components using a synthesizeable VHDL flexible library\",\"authors\":\"E. Domenis, E. Filippi, L. Licciardi, M. Paolini, M. Turolla, D. Rouquier\",\"doi\":\"10.1109/ASPDAC.1995.486403\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A flexible synthesis library for fast and safe prototyping of VLSI circuits for telecom applications is presented. Library modules are described in VHDL so as to be portable in different CAD frameworks and easily usable by IC and system designers. Module flexibility is achieved by using generic parameter programming; mapping can be done on FPGAs, semicustom and cell based CMOS libraries. Modules can reach several thousand gates in size and a target frequency of 40 MHz for a CMOS semicustom design. A VLSI MPEG1 audio decoder developed as a methodology test vehicle is finally detailed.\",\"PeriodicalId\":119232,\"journal\":{\"name\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"volume\":\"300 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.1995.486403\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1995.486403","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fast prototyping for telecom components using a synthesizeable VHDL flexible library
A flexible synthesis library for fast and safe prototyping of VLSI circuits for telecom applications is presented. Library modules are described in VHDL so as to be portable in different CAD frameworks and easily usable by IC and system designers. Module flexibility is achieved by using generic parameter programming; mapping can be done on FPGAs, semicustom and cell based CMOS libraries. Modules can reach several thousand gates in size and a target frequency of 40 MHz for a CMOS semicustom design. A VLSI MPEG1 audio decoder developed as a methodology test vehicle is finally detailed.