{"title":"基于IEEE-754标准的双精度混沌信号发生器优化设计","authors":"X. Chen, Fei Xiang, Lili Zhang","doi":"10.1109/ICAL.2012.6308251","DOIUrl":null,"url":null,"abstract":"An optimal approach for the field programmable gate array (FPGA) double-precision chaotic signal generator based on IEEE-754 standard is proposed. The goal to implement a double-precision chaotic signal generator on FPGA is attained and balance at both sides of the chip area and working speed is achieved by utilizing timing control and parallel architecture.","PeriodicalId":373152,"journal":{"name":"2012 IEEE International Conference on Automation and Logistics","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Optimal design of double-precision chaotic signal generators based on IEEE-754 standard\",\"authors\":\"X. Chen, Fei Xiang, Lili Zhang\",\"doi\":\"10.1109/ICAL.2012.6308251\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An optimal approach for the field programmable gate array (FPGA) double-precision chaotic signal generator based on IEEE-754 standard is proposed. The goal to implement a double-precision chaotic signal generator on FPGA is attained and balance at both sides of the chip area and working speed is achieved by utilizing timing control and parallel architecture.\",\"PeriodicalId\":373152,\"journal\":{\"name\":\"2012 IEEE International Conference on Automation and Logistics\",\"volume\":\"65 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-09-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Conference on Automation and Logistics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICAL.2012.6308251\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Conference on Automation and Logistics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAL.2012.6308251","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimal design of double-precision chaotic signal generators based on IEEE-754 standard
An optimal approach for the field programmable gate array (FPGA) double-precision chaotic signal generator based on IEEE-754 standard is proposed. The goal to implement a double-precision chaotic signal generator on FPGA is attained and balance at both sides of the chip area and working speed is achieved by utilizing timing control and parallel architecture.