基于Lite卷积神经网络的眼部生物特征识别硬件加速器的设计与FPGA实现

Wei-Che Sun, Chih-Peng Fan, Chung-Bin Wu
{"title":"基于Lite卷积神经网络的眼部生物特征识别硬件加速器的设计与FPGA实现","authors":"Wei-Che Sun, Chih-Peng Fan, Chung-Bin Wu","doi":"10.1109/MCSoC57363.2022.00051","DOIUrl":null,"url":null,"abstract":"In this study, the effective low-complexity Convolutional Neural Network (CNN) inference network is implemented by the FPGA-based hardware accelerator for the biometric authentications. After the labeling processes, the eye images with partial iris and sclera zones are used to train and test the LeNet-based Lite-CNN model. Then the lightweight CNN classifier is rapidly prototyped via FPGA for hardware acceleration. Through testing, the proposed Lite-CNN model achieves up to 98% recognition accuracy with the eye images. Compared with the software-based implementation, the proposed Lite-CNN hardware accelerator provides similar detection accuracy, and the inference time of 0.0246 seconds is accelerated about 377 times on the Xilinx ZCU102 FPGA platform. Besides, compared with the previous FPGA implementation by the high level synthesis design, the proposed hardware acceleration design performs the computing speed more than about 92 times.","PeriodicalId":150801,"journal":{"name":"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition Technology\",\"authors\":\"Wei-Che Sun, Chih-Peng Fan, Chung-Bin Wu\",\"doi\":\"10.1109/MCSoC57363.2022.00051\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, the effective low-complexity Convolutional Neural Network (CNN) inference network is implemented by the FPGA-based hardware accelerator for the biometric authentications. After the labeling processes, the eye images with partial iris and sclera zones are used to train and test the LeNet-based Lite-CNN model. Then the lightweight CNN classifier is rapidly prototyped via FPGA for hardware acceleration. Through testing, the proposed Lite-CNN model achieves up to 98% recognition accuracy with the eye images. Compared with the software-based implementation, the proposed Lite-CNN hardware accelerator provides similar detection accuracy, and the inference time of 0.0246 seconds is accelerated about 377 times on the Xilinx ZCU102 FPGA platform. Besides, compared with the previous FPGA implementation by the high level synthesis design, the proposed hardware acceleration design performs the computing speed more than about 92 times.\",\"PeriodicalId\":150801,\"journal\":{\"name\":\"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MCSoC57363.2022.00051\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCSoC57363.2022.00051","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

在本研究中,采用基于fpga的硬件加速器实现了有效的低复杂度卷积神经网络(CNN)推理网络,用于生物识别认证。经过标记处理后,使用部分虹膜和巩膜区域的眼睛图像来训练和测试基于lenet的Lite-CNN模型。然后通过FPGA快速原型化轻量级CNN分类器,实现硬件加速。通过测试,本文提出的Lite-CNN模型对人眼图像的识别准确率高达98%。与基于软件的实现相比,本文提出的Lite-CNN硬件加速器提供了相似的检测精度,并且在Xilinx ZCU102 FPGA平台上将0.0246秒的推理时间加快了约377倍。此外,与以往采用高级综合设计的FPGA实现相比,所提出的硬件加速设计将计算速度提高了约92倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition Technology
In this study, the effective low-complexity Convolutional Neural Network (CNN) inference network is implemented by the FPGA-based hardware accelerator for the biometric authentications. After the labeling processes, the eye images with partial iris and sclera zones are used to train and test the LeNet-based Lite-CNN model. Then the lightweight CNN classifier is rapidly prototyped via FPGA for hardware acceleration. Through testing, the proposed Lite-CNN model achieves up to 98% recognition accuracy with the eye images. Compared with the software-based implementation, the proposed Lite-CNN hardware accelerator provides similar detection accuracy, and the inference time of 0.0246 seconds is accelerated about 377 times on the Xilinx ZCU102 FPGA platform. Besides, compared with the previous FPGA implementation by the high level synthesis design, the proposed hardware acceleration design performs the computing speed more than about 92 times.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信