{"title":"基于Lite卷积神经网络的眼部生物特征识别硬件加速器的设计与FPGA实现","authors":"Wei-Che Sun, Chih-Peng Fan, Chung-Bin Wu","doi":"10.1109/MCSoC57363.2022.00051","DOIUrl":null,"url":null,"abstract":"In this study, the effective low-complexity Convolutional Neural Network (CNN) inference network is implemented by the FPGA-based hardware accelerator for the biometric authentications. After the labeling processes, the eye images with partial iris and sclera zones are used to train and test the LeNet-based Lite-CNN model. Then the lightweight CNN classifier is rapidly prototyped via FPGA for hardware acceleration. Through testing, the proposed Lite-CNN model achieves up to 98% recognition accuracy with the eye images. Compared with the software-based implementation, the proposed Lite-CNN hardware accelerator provides similar detection accuracy, and the inference time of 0.0246 seconds is accelerated about 377 times on the Xilinx ZCU102 FPGA platform. Besides, compared with the previous FPGA implementation by the high level synthesis design, the proposed hardware acceleration design performs the computing speed more than about 92 times.","PeriodicalId":150801,"journal":{"name":"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition Technology\",\"authors\":\"Wei-Che Sun, Chih-Peng Fan, Chung-Bin Wu\",\"doi\":\"10.1109/MCSoC57363.2022.00051\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, the effective low-complexity Convolutional Neural Network (CNN) inference network is implemented by the FPGA-based hardware accelerator for the biometric authentications. After the labeling processes, the eye images with partial iris and sclera zones are used to train and test the LeNet-based Lite-CNN model. Then the lightweight CNN classifier is rapidly prototyped via FPGA for hardware acceleration. Through testing, the proposed Lite-CNN model achieves up to 98% recognition accuracy with the eye images. Compared with the software-based implementation, the proposed Lite-CNN hardware accelerator provides similar detection accuracy, and the inference time of 0.0246 seconds is accelerated about 377 times on the Xilinx ZCU102 FPGA platform. Besides, compared with the previous FPGA implementation by the high level synthesis design, the proposed hardware acceleration design performs the computing speed more than about 92 times.\",\"PeriodicalId\":150801,\"journal\":{\"name\":\"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MCSoC57363.2022.00051\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCSoC57363.2022.00051","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition Technology
In this study, the effective low-complexity Convolutional Neural Network (CNN) inference network is implemented by the FPGA-based hardware accelerator for the biometric authentications. After the labeling processes, the eye images with partial iris and sclera zones are used to train and test the LeNet-based Lite-CNN model. Then the lightweight CNN classifier is rapidly prototyped via FPGA for hardware acceleration. Through testing, the proposed Lite-CNN model achieves up to 98% recognition accuracy with the eye images. Compared with the software-based implementation, the proposed Lite-CNN hardware accelerator provides similar detection accuracy, and the inference time of 0.0246 seconds is accelerated about 377 times on the Xilinx ZCU102 FPGA platform. Besides, compared with the previous FPGA implementation by the high level synthesis design, the proposed hardware acceleration design performs the computing speed more than about 92 times.