M. Paavola, M. Kamarainen, E. Laulainen, M. Saukoski, L. Koskinen, M. Kosunen, K. Halonen
{"title":"一种21.2μA ΔΣ-based接口的电容式三轴微加速度计专用集成电路","authors":"M. Paavola, M. Kamarainen, E. Laulainen, M. Saukoski, L. Koskinen, M. Kosunen, K. Halonen","doi":"10.1109/ASSCC.2008.4708739","DOIUrl":null,"url":null,"abstract":"In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer implemented in a 0.25-mum CMOS process is presented. The fully-integrated sensor interface consists of a DeltaSigma sensor front-end that converts the acceleration signal into the digital domain, a decimator, a frequency reference, a clock generator for the front-end, a voltage and current reference, the required reference buffers, and low-dropout regulators (LDOs) needed for system-on-chip power management. The interface IC provides operating modes for 1 and 25 Hz signal bandwidths. The chip with a 1.72 mm2 active area draws 21.2 muA in 1 Hz mode, and 97.6 muA in 25 Hz mode, from a 1.2-2.75 V supply. In 1 Hz mode with a plusmn2 -g capacitive 3-axis accelerometer, the measured noise floors in the x-, y-, and z-directions are 1080, 1165 and 930 mug/radicHz, respectively.","PeriodicalId":143173,"journal":{"name":"2008 IEEE Asian Solid-State Circuits Conference","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 21.2μA ΔΣ-based interface ASIC for a capacitive 3-axis micro-accelerometer\",\"authors\":\"M. Paavola, M. Kamarainen, E. Laulainen, M. Saukoski, L. Koskinen, M. Kosunen, K. Halonen\",\"doi\":\"10.1109/ASSCC.2008.4708739\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer implemented in a 0.25-mum CMOS process is presented. The fully-integrated sensor interface consists of a DeltaSigma sensor front-end that converts the acceleration signal into the digital domain, a decimator, a frequency reference, a clock generator for the front-end, a voltage and current reference, the required reference buffers, and low-dropout regulators (LDOs) needed for system-on-chip power management. The interface IC provides operating modes for 1 and 25 Hz signal bandwidths. The chip with a 1.72 mm2 active area draws 21.2 muA in 1 Hz mode, and 97.6 muA in 25 Hz mode, from a 1.2-2.75 V supply. In 1 Hz mode with a plusmn2 -g capacitive 3-axis accelerometer, the measured noise floors in the x-, y-, and z-directions are 1080, 1165 and 930 mug/radicHz, respectively.\",\"PeriodicalId\":143173,\"journal\":{\"name\":\"2008 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"2014 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2008.4708739\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2008.4708739","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 21.2μA ΔΣ-based interface ASIC for a capacitive 3-axis micro-accelerometer
In this paper, a micropower interface IC for a capacitive 3-axis micro-accelerometer implemented in a 0.25-mum CMOS process is presented. The fully-integrated sensor interface consists of a DeltaSigma sensor front-end that converts the acceleration signal into the digital domain, a decimator, a frequency reference, a clock generator for the front-end, a voltage and current reference, the required reference buffers, and low-dropout regulators (LDOs) needed for system-on-chip power management. The interface IC provides operating modes for 1 and 25 Hz signal bandwidths. The chip with a 1.72 mm2 active area draws 21.2 muA in 1 Hz mode, and 97.6 muA in 25 Hz mode, from a 1.2-2.75 V supply. In 1 Hz mode with a plusmn2 -g capacitive 3-axis accelerometer, the measured noise floors in the x-, y-, and z-directions are 1080, 1165 and 930 mug/radicHz, respectively.