{"title":"使用一类低灵敏度结构的递归数字滤波器的无乘法器实现","authors":"M. Bhattacharya, J. Astola, T. Saramäki","doi":"10.1109/ISSPA.2001.950219","DOIUrl":null,"url":null,"abstract":"One of the method of reducing coefficient sensitivity is that of coefficient translation. The structure is altered in such a way that the sensitivity with respect to the modified coefficients is reduced to a great extent compared to that with respect to the original coefficients. In low sensitivity structures the modified coefficients can be realized with multipliers of shorter wordlength i.e., in fewer number bits. When these are implemented in minimum numbers of signed powers of two (MNSPT) form, we have a multiplierless implementation These implementations are not associated with increase in the order of the filter that involves more number of shift registers, data paths, control circuits, etc., and hence, an increase in complexity i.e. indirect overheads.","PeriodicalId":236050,"journal":{"name":"Proceedings of the Sixth International Symposium on Signal Processing and its Applications (Cat.No.01EX467)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multiplierless implementation of recursive digital filters using a class of low sensitivity structures\",\"authors\":\"M. Bhattacharya, J. Astola, T. Saramäki\",\"doi\":\"10.1109/ISSPA.2001.950219\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"One of the method of reducing coefficient sensitivity is that of coefficient translation. The structure is altered in such a way that the sensitivity with respect to the modified coefficients is reduced to a great extent compared to that with respect to the original coefficients. In low sensitivity structures the modified coefficients can be realized with multipliers of shorter wordlength i.e., in fewer number bits. When these are implemented in minimum numbers of signed powers of two (MNSPT) form, we have a multiplierless implementation These implementations are not associated with increase in the order of the filter that involves more number of shift registers, data paths, control circuits, etc., and hence, an increase in complexity i.e. indirect overheads.\",\"PeriodicalId\":236050,\"journal\":{\"name\":\"Proceedings of the Sixth International Symposium on Signal Processing and its Applications (Cat.No.01EX467)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Sixth International Symposium on Signal Processing and its Applications (Cat.No.01EX467)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSPA.2001.950219\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Sixth International Symposium on Signal Processing and its Applications (Cat.No.01EX467)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSPA.2001.950219","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Multiplierless implementation of recursive digital filters using a class of low sensitivity structures
One of the method of reducing coefficient sensitivity is that of coefficient translation. The structure is altered in such a way that the sensitivity with respect to the modified coefficients is reduced to a great extent compared to that with respect to the original coefficients. In low sensitivity structures the modified coefficients can be realized with multipliers of shorter wordlength i.e., in fewer number bits. When these are implemented in minimum numbers of signed powers of two (MNSPT) form, we have a multiplierless implementation These implementations are not associated with increase in the order of the filter that involves more number of shift registers, data paths, control circuits, etc., and hence, an increase in complexity i.e. indirect overheads.