180nm CMOS共尾电感低噪声压控振荡器

Yu Peng, Huihua Liu, Shuangfeng Kong, Yi-ming Yu, Chenxi Zhao, Yunqiu Wu, K. Kang
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引用次数: 3

摘要

提出了一种带有共尾电感的低噪声压控振荡器(VCO)。采用“共模耦合”拓扑结构,降低了相位噪声,简化了耦合网络。所提出的共尾电感可以滤除噪声并耦合两个振荡器的共模电压。同时,通用尾电感结构减少了尾电感的数量。该VCO采用180nm 1P6M CMOS工艺设计和实现。测量结果表明,在1 MHz偏置时,相位噪声为- 124 dBc/Hz,在1 v电源下功耗为20 mW时,FOM值约为187 dBc/Hz。核心电路的面积为$1\ mathm {mm}乘以$ 0.8\ mathm {mm}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Low Noise VCO with Common-Tail Inductor in 180nm CMOS Technology
This paper presents a low noise voltage-controlled oscillator (VCO) with common-tail inductor. The “common-mode coupling” topology is adopted to reduce the phase noise and to simplify the coupling network. The proposed common-tail inductor could filter the noise and couple the common-mode voltage from two oscillators. Meanwhile, the common tail inductor structure decreases the number of tail inductor. The proposed VCO is designed and implemented utilizing 180 nm 1P6M CMOS process. The measurement result shows the phase noise is −124 dBc/Hz at 1 MHz offset from 6.24 GHz, and the figure of merit (FOM) is about 187 dBc/Hz while consuming 20 mW with a 1-V supply. The core circuit occupies an area of $1\mathrm{mm}\times 0.8\mathrm{mm}$.
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