{"title":"用于图像处理的不完全连接的二维阵列","authors":"J. Trotter, W. Moore","doi":"10.1109/FTCS.1989.105548","DOIUrl":null,"url":null,"abstract":"An image processing architecture designed for ultralarge-scale and wafer-scale integration which uses a novel fault-tolerance strategy is described. The strategy overcomes many of the problems associated with configuring a 2D array from cells and spares with some kind of switching network. It provides a novel approach to fault tolerance because the primary mechanism for tolerating faults is neither hardware redundancy nor time redundancy but is a trade against processing resolution. The architecture provides a working, gracefully degrading array for image processing.<<ETX>>","PeriodicalId":230363,"journal":{"name":"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"116 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Imperfectly connected 2D arrays for image processing\",\"authors\":\"J. Trotter, W. Moore\",\"doi\":\"10.1109/FTCS.1989.105548\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An image processing architecture designed for ultralarge-scale and wafer-scale integration which uses a novel fault-tolerance strategy is described. The strategy overcomes many of the problems associated with configuring a 2D array from cells and spares with some kind of switching network. It provides a novel approach to fault tolerance because the primary mechanism for tolerating faults is neither hardware redundancy nor time redundancy but is a trade against processing resolution. The architecture provides a working, gracefully degrading array for image processing.<<ETX>>\",\"PeriodicalId\":230363,\"journal\":{\"name\":\"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers\",\"volume\":\"116 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FTCS.1989.105548\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FTCS.1989.105548","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Imperfectly connected 2D arrays for image processing
An image processing architecture designed for ultralarge-scale and wafer-scale integration which uses a novel fault-tolerance strategy is described. The strategy overcomes many of the problems associated with configuring a 2D array from cells and spares with some kind of switching network. It provides a novel approach to fault tolerance because the primary mechanism for tolerating faults is neither hardware redundancy nor time redundancy but is a trade against processing resolution. The architecture provides a working, gracefully degrading array for image processing.<>