{"title":"背面膜对硅片快速热氧化生长的影响","authors":"A. Omar, I. Ahmad","doi":"10.1109/SMELEC.1998.781154","DOIUrl":null,"url":null,"abstract":"The effect of backside films, namely silicon dioxide, silicon nitride and bare silicon on rapid thermal oxidation (RTO) growth on silicon wafers by the rapid thermal annealing technique was systematically studied. There was also a comparison study on the effect of doped backside films with phosphorus at 4/spl times/10/sup 14/ atoms/cm/sup 2/ by ion implantation at 100 keV and the undoped films. The RTO layer thickness has been measured by ellipsometry and the target thickness was 10 nm. The rapid thermal annealing system used was the AG Associates 2146 Heatpulse model. The temperature chosen was 1100/spl deg/C. It was demonstrated that thinner RTO layers could be obtained by having sufficient silicon dioxide film at the backside; however, the presence of doped backside layers has no effect on the tunnel oxide growth.","PeriodicalId":356206,"journal":{"name":"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)","volume":"68 3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"The effect of backside films on rapid thermal oxidation (RTO) growth on silicon wafers\",\"authors\":\"A. Omar, I. Ahmad\",\"doi\":\"10.1109/SMELEC.1998.781154\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The effect of backside films, namely silicon dioxide, silicon nitride and bare silicon on rapid thermal oxidation (RTO) growth on silicon wafers by the rapid thermal annealing technique was systematically studied. There was also a comparison study on the effect of doped backside films with phosphorus at 4/spl times/10/sup 14/ atoms/cm/sup 2/ by ion implantation at 100 keV and the undoped films. The RTO layer thickness has been measured by ellipsometry and the target thickness was 10 nm. The rapid thermal annealing system used was the AG Associates 2146 Heatpulse model. The temperature chosen was 1100/spl deg/C. It was demonstrated that thinner RTO layers could be obtained by having sufficient silicon dioxide film at the backside; however, the presence of doped backside layers has no effect on the tunnel oxide growth.\",\"PeriodicalId\":356206,\"journal\":{\"name\":\"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)\",\"volume\":\"68 3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-11-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.1998.781154\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICSE'98. 1998 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.98EX187)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.1998.781154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The effect of backside films on rapid thermal oxidation (RTO) growth on silicon wafers
The effect of backside films, namely silicon dioxide, silicon nitride and bare silicon on rapid thermal oxidation (RTO) growth on silicon wafers by the rapid thermal annealing technique was systematically studied. There was also a comparison study on the effect of doped backside films with phosphorus at 4/spl times/10/sup 14/ atoms/cm/sup 2/ by ion implantation at 100 keV and the undoped films. The RTO layer thickness has been measured by ellipsometry and the target thickness was 10 nm. The rapid thermal annealing system used was the AG Associates 2146 Heatpulse model. The temperature chosen was 1100/spl deg/C. It was demonstrated that thinner RTO layers could be obtained by having sufficient silicon dioxide film at the backside; however, the presence of doped backside layers has no effect on the tunnel oxide growth.