{"title":"采用输出功率标度技术的单电源单芯反相d类数字功率放大器","authors":"Kyung-Sik Choi, J. Ko, Sang-Gug Lee","doi":"10.23919/VLSICircuits52068.2021.9492341","DOIUrl":null,"url":null,"abstract":"This work presents a current-mode inverse Class-D digital PA (DPA) with enhanced power back-off (PBO) efficiency. The PA adopts extra switches, which allows the scaling in the output voltage swing by half, leading to (theoretically) 6 dB enhancement in PBO efficiency while maintaining (ideally) 100% drain efficiency (DE). Implemented in a 65 nm CMOS, the proposed DPA shows the improvement in DE by ×1.5 at 4.2 dB PBO in comparison with normalized Class-B PA while requiring only one transformer and single-supply voltage.","PeriodicalId":106356,"journal":{"name":"2021 Symposium on VLSI Circuits","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A Single-Supply Single-Core Inverse Class-D Digital Power Amplifier with Enhanced Power Back-Off Efficiency Adopting Output Power Scaling Technique\",\"authors\":\"Kyung-Sik Choi, J. Ko, Sang-Gug Lee\",\"doi\":\"10.23919/VLSICircuits52068.2021.9492341\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a current-mode inverse Class-D digital PA (DPA) with enhanced power back-off (PBO) efficiency. The PA adopts extra switches, which allows the scaling in the output voltage swing by half, leading to (theoretically) 6 dB enhancement in PBO efficiency while maintaining (ideally) 100% drain efficiency (DE). Implemented in a 65 nm CMOS, the proposed DPA shows the improvement in DE by ×1.5 at 4.2 dB PBO in comparison with normalized Class-B PA while requiring only one transformer and single-supply voltage.\",\"PeriodicalId\":106356,\"journal\":{\"name\":\"2021 Symposium on VLSI Circuits\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Symposium on VLSI Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSICircuits52068.2021.9492341\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSICircuits52068.2021.9492341","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
摘要
这项工作提出了一种具有增强功率回退(PBO)效率的电流模式逆d类数字PA (DPA)。PA采用额外的开关,允许将输出电压摆幅缩放一半,导致PBO效率(理论上)提高6 dB,同时保持(理想)100%漏极效率(DE)。在65nm CMOS上实现的DPA在4.2 dB PBO下的DE比标准化的b类PA提高×1.5,而只需要一个变压器和单电源电压。
A Single-Supply Single-Core Inverse Class-D Digital Power Amplifier with Enhanced Power Back-Off Efficiency Adopting Output Power Scaling Technique
This work presents a current-mode inverse Class-D digital PA (DPA) with enhanced power back-off (PBO) efficiency. The PA adopts extra switches, which allows the scaling in the output voltage swing by half, leading to (theoretically) 6 dB enhancement in PBO efficiency while maintaining (ideally) 100% drain efficiency (DE). Implemented in a 65 nm CMOS, the proposed DPA shows the improvement in DE by ×1.5 at 4.2 dB PBO in comparison with normalized Class-B PA while requiring only one transformer and single-supply voltage.