AVS视频标准实现SoC设计

Xin Jin, Songnan Li, K. Ngan
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引用次数: 3

摘要

AVS1-P2是中国音视频编码标准(AVS)工作组最新发布的视频标准,其性能接近H.264/AVC主标准,且复杂度更低。本文针对AVS1-P2解码器开发了一个独立于平台的软件包,便于嵌入式视频编解码器的开发。为了最大限度地减少片内内存和节省片内/片外数据传输所消耗的时间,通过修改数据流、解码层次和底层解码内核的缓冲区定义和管理,开发了一种基于mb的架构。当解码720 p(1280次720)序列时,这种系统架构比基于帧的架构减少了80%以上的片上内存。通过对解码内核和数据传输模块的模块化,本文提出的基于mb的解码器为AVS视频解码器在目标平台上的开发提供了便利。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
AVS video standard implementation for SoC design
AVS1-P2 is the newest video standard of Audio Video coding Standard (AVS) workgroup of China, which provides close performance to H.264/AVC main profile with lower complexity. In this paper, a platform independent software package is developed for AVS1-P2 decoder to facilitate embedded video codec development. In order to minimize the on-chip memory and save the time consumed in on-chip/off-chip data transfer, an MB-based architecture is developed by modifying the data flow, decoding hierarchy, and the buffer definition and management for low-level decoding kernels. Such system architecture provides over 80% reduction in on-chip memory compared to the frame-based architecture when decoding 720 p (1280times720) sequences. By modularizing the decoding kernels and data transfer modules, the proposed MB-based decoder facilitates the AVS video decoder development on the target platform.
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