高精度双缓冲MEMS加速度地震仪的设计

Ping Gan, Huan Yu, Zhuo Chen, Dong Lianli, Xiaohu Shen, Ming Yu, Yu Zhang, Cailan Zeng, Xiaosong Zhang
{"title":"高精度双缓冲MEMS加速度地震仪的设计","authors":"Ping Gan, Huan Yu, Zhuo Chen, Dong Lianli, Xiaohu Shen, Ming Yu, Yu Zhang, Cailan Zeng, Xiaosong Zhang","doi":"10.1109/ICCWAMTIP.2014.7073424","DOIUrl":null,"url":null,"abstract":"In this paper, a new type of high precision double buffered MEMS acceleration seismometer is introduced. The MEMS sensor technology, Σ- delta 24 bits A/D conversion technology are adopted in our method. Furthermore, FPGA extended SDRAM is utilized for the implementation. Experiments show that the detector performance compared with France's DSU3 Sercel co, frequency response reaches 0-784Hz; Power consumption is 160 mV, which can realize the large volume of 128 Mbit cache. The dynamic range and band width has been greatly improved than traditional receiver, and the ability to resist electromagnetic interference is enhanced.","PeriodicalId":211273,"journal":{"name":"2014 11th International Computer Conference on Wavelet Actiev Media Technology and Information Processing(ICCWAMTIP)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The design of high precision double buffer MEMS acceleration seismometer\",\"authors\":\"Ping Gan, Huan Yu, Zhuo Chen, Dong Lianli, Xiaohu Shen, Ming Yu, Yu Zhang, Cailan Zeng, Xiaosong Zhang\",\"doi\":\"10.1109/ICCWAMTIP.2014.7073424\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a new type of high precision double buffered MEMS acceleration seismometer is introduced. The MEMS sensor technology, Σ- delta 24 bits A/D conversion technology are adopted in our method. Furthermore, FPGA extended SDRAM is utilized for the implementation. Experiments show that the detector performance compared with France's DSU3 Sercel co, frequency response reaches 0-784Hz; Power consumption is 160 mV, which can realize the large volume of 128 Mbit cache. The dynamic range and band width has been greatly improved than traditional receiver, and the ability to resist electromagnetic interference is enhanced.\",\"PeriodicalId\":211273,\"journal\":{\"name\":\"2014 11th International Computer Conference on Wavelet Actiev Media Technology and Information Processing(ICCWAMTIP)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 11th International Computer Conference on Wavelet Actiev Media Technology and Information Processing(ICCWAMTIP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCWAMTIP.2014.7073424\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 11th International Computer Conference on Wavelet Actiev Media Technology and Information Processing(ICCWAMTIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCWAMTIP.2014.7073424","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

介绍了一种新型高精度双缓冲微机电系统加速度地震仪。本方法采用MEMS传感器技术Σ- delta 24位A/D转换技术。此外,FPGA扩展的SDRAM被用于实现。实验表明,该探测器性能与法国的DSU3 Sercel公司相比,频率响应达到0-784Hz;功耗为160mv,可实现128mbit的大容量缓存。与传统接收机相比,该接收机的动态范围和带宽有了很大的提高,抗电磁干扰的能力得到了增强。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The design of high precision double buffer MEMS acceleration seismometer
In this paper, a new type of high precision double buffered MEMS acceleration seismometer is introduced. The MEMS sensor technology, Σ- delta 24 bits A/D conversion technology are adopted in our method. Furthermore, FPGA extended SDRAM is utilized for the implementation. Experiments show that the detector performance compared with France's DSU3 Sercel co, frequency response reaches 0-784Hz; Power consumption is 160 mV, which can realize the large volume of 128 Mbit cache. The dynamic range and band width has been greatly improved than traditional receiver, and the ability to resist electromagnetic interference is enhanced.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信