一种17-95.6 TOPS/W深度学习推理加速器,用于5nm变压器的逐向量缩放4位量化

Ben Keller, Rangharajan Venkatesan, Steve Dai, S. Tell, B. Zimmer, W. Dally, C. T. Gray, Brucek Khailany
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引用次数: 11

摘要

我们提出了一个深度神经网络(DNN)加速器,设计用于有效执行基于变压器的DNN,这在自然语言处理任务中已经无处不在。DNN推理加速器通常采用专门的硬件技术,例如降低精度以提高能源效率,但这些技术中的许多会导致变压器的灾难性精度损失。所提出的加速器支持逐向量缩放量化和近似softmax,使使用4位算术具有很小的精度损失。5nm原型在基准测试中达到95.6 TOPS/W,在BERT上达到1711 inference /s/W,精度损失仅为0.7%,展示了一种实用的加速器设计,用于变压器的节能推理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm
We present a deep neural network (DNN) accelerator designed for efficient execution of transformer-based DNNs, which have become ubiquitous for natural language processing tasks. DNN inference accelerators often employ specialized hardware techniques such as reduced precision to improve energy efficiency, but many of these techniques result in catastrophic accuracy loss on transformers. The proposed accelerator supports per-vector scaled quantization and approximate softmax to enable the use of 4-bit arithmetic with little accuracy loss. The 5nm prototype achieves 95.6 TOPS/W in benchmarking and 1711 inferences/s/W with only 0.7% accuracy loss on BERT, demonstrating a practical accelerator design for energy-efficient inference with transformers.
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