{"title":"一种用于正弦输入信号的非线性Flash模拟数字结构","authors":"C. Berdanier, J. Scanlan","doi":"10.1109/NAECON.2008.4806521","DOIUrl":null,"url":null,"abstract":"We hypothesize that we can improve the footprint by using a static non-linear flash encoding scheme for Analog to Digital (A/D) converters for an important set of functions. This architecture can reduce the number of comparators and resisters in a flash converter by 25%..","PeriodicalId":254758,"journal":{"name":"2008 IEEE National Aerospace and Electronics Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Non-Linear Flash Analog to Digital Architecture for Sinusoidal Input Signals\",\"authors\":\"C. Berdanier, J. Scanlan\",\"doi\":\"10.1109/NAECON.2008.4806521\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We hypothesize that we can improve the footprint by using a static non-linear flash encoding scheme for Analog to Digital (A/D) converters for an important set of functions. This architecture can reduce the number of comparators and resisters in a flash converter by 25%..\",\"PeriodicalId\":254758,\"journal\":{\"name\":\"2008 IEEE National Aerospace and Electronics Conference\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE National Aerospace and Electronics Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.2008.4806521\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE National Aerospace and Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.2008.4806521","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Non-Linear Flash Analog to Digital Architecture for Sinusoidal Input Signals
We hypothesize that we can improve the footprint by using a static non-linear flash encoding scheme for Analog to Digital (A/D) converters for an important set of functions. This architecture can reduce the number of comparators and resisters in a flash converter by 25%..