一种用于正弦输入信号的非线性Flash模拟数字结构

C. Berdanier, J. Scanlan
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引用次数: 1

摘要

我们假设我们可以通过使用静态非线性闪存编码方案来改善模拟到数字(a /D)转换器的一组重要功能。这种结构可以减少25%的比较器和电阻在闪存转换器的数量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Non-Linear Flash Analog to Digital Architecture for Sinusoidal Input Signals
We hypothesize that we can improve the footprint by using a static non-linear flash encoding scheme for Analog to Digital (A/D) converters for an important set of functions. This architecture can reduce the number of comparators and resisters in a flash converter by 25%..
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