An utilization-efficient context memory design for reconfigurable processing array with locally shared strategy

In recent years, reconfigurable architectures have gained popularity as they have advantages on the design of energyefficient accelerators. Facing many application scenarios, existing reconfigurable processing arrays need access context information from distributed or centralized context memory which was exposed to low storage efficient. In this paper, we propose a locally shared context memory architecture of a reconfigurable processing array to improve storage efficiency and greatly reduce the context data movement. This design can reduce the area of the reconfigurable array by 12.4%, and the power consumption of the reconfigurable array by 40%.