{"title":"栅极全能多晶硅纳米线晶体管中四电平随机电报噪声的表征","authors":"You-Tai Chang, Pei-Wen Li, Horng-Chih Lin","doi":"10.23919/SNW.2019.8782974","DOIUrl":null,"url":null,"abstract":"Four-level random-telegraph-noise (RTN) characteristics of a gate-all-around (GAA) poly-Si junctionless (JL) nanowire (NW) transistor induced by two discrete traps are studied in this work. By carefully analyzing the RTN, depths of the two traps in the gate oxide can be identified separately. Consistent information is obtained by assessing the probability of transitions between different levels.","PeriodicalId":170513,"journal":{"name":"2019 Silicon Nanoelectronics Workshop (SNW)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Characterization of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor\",\"authors\":\"You-Tai Chang, Pei-Wen Li, Horng-Chih Lin\",\"doi\":\"10.23919/SNW.2019.8782974\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Four-level random-telegraph-noise (RTN) characteristics of a gate-all-around (GAA) poly-Si junctionless (JL) nanowire (NW) transistor induced by two discrete traps are studied in this work. By carefully analyzing the RTN, depths of the two traps in the gate oxide can be identified separately. Consistent information is obtained by assessing the probability of transitions between different levels.\",\"PeriodicalId\":170513,\"journal\":{\"name\":\"2019 Silicon Nanoelectronics Workshop (SNW)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 Silicon Nanoelectronics Workshop (SNW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/SNW.2019.8782974\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SNW.2019.8782974","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor
Four-level random-telegraph-noise (RTN) characteristics of a gate-all-around (GAA) poly-Si junctionless (JL) nanowire (NW) transistor induced by two discrete traps are studied in this work. By carefully analyzing the RTN, depths of the two traps in the gate oxide can be identified separately. Consistent information is obtained by assessing the probability of transitions between different levels.