基于进位保存加法的快速紧凑交错模乘法

O. Mazonka, E. Chielle, Deepraj Soni, M. Maniatakos
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引用次数: 2

摘要

通过设计专用硬件来改进全同态加密计算是一个活跃的研究课题。最突出的加密方案在长多项式上操作,需要对非常大的数字进行许多并发的模乘法。因此,使用许多小而有效的乘数是至关重要的。交错和蒙哥马利迭代乘法器是该任务的最佳候选。然而,交错设计的延迟较长,因为它们需要在每次迭代中进行数字比较;另一方面,Montgomery设计需要对操作数或结果进行额外的转换。在这项工作中,我们提出了一种新颖的硬件设计,它结合了两个世界的优点:展示了蒙哥马利设计的进位和添加,而不需要任何域转换。实验结果表明,与标准交错乘法器相比,延迟面积乘积效率提高了47%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fast and Compact Interleaved Modular Multiplication based on Carry Save Addition
Improving fully homomorphic encryption computation by designing specialized hardware is an active topic of research. The most prominent encryption schemes operate on long polynomials requiring many concurrent modular multiplications of very big numbers. Thus, it is crucial to use many small and efficient multipliers. Interleaved and Montgomery iterative multipliers are the best candidates for the task. Interleaved designs, however, suffer from longer latency as they require a number comparison within each iteration; Montgomery designs, on the other hand, need extra conversion of the operands or the result. In this work, we propose a novel hardware design that combines the best of both worlds: Exhibiting the carry save addition of Montgomery designs without the need for any domain conversions. Experimental results demonstrate improved latency-area product efficiency by up to 47% when compared to the standard Interleaved multiplier for large arithmetic word sizes.
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