{"title":"VRS系统需求的符号化验证","authors":"Oleksandr A. Letychevskyi, T. Weigert","doi":"10.1109/RE.2014.6912282","DOIUrl":null,"url":null,"abstract":"VRS (Verification Requirements Specifications) system is a tool for processing formal requirements during the initial stage of software, hardware, or system development. Symbolic modeling and deductive methods are used for detection of issues such as safety violations, deadlocks, nondeterminism, or livelocks. The formal representation of requirements also supports the generation of test suites as well as the synthesis of a design model.","PeriodicalId":307764,"journal":{"name":"2014 IEEE 22nd International Requirements Engineering Conference (RE)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Symbolic verification of requirements in VRS system\",\"authors\":\"Oleksandr A. Letychevskyi, T. Weigert\",\"doi\":\"10.1109/RE.2014.6912282\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"VRS (Verification Requirements Specifications) system is a tool for processing formal requirements during the initial stage of software, hardware, or system development. Symbolic modeling and deductive methods are used for detection of issues such as safety violations, deadlocks, nondeterminism, or livelocks. The formal representation of requirements also supports the generation of test suites as well as the synthesis of a design model.\",\"PeriodicalId\":307764,\"journal\":{\"name\":\"2014 IEEE 22nd International Requirements Engineering Conference (RE)\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE 22nd International Requirements Engineering Conference (RE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RE.2014.6912282\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE 22nd International Requirements Engineering Conference (RE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RE.2014.6912282","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Symbolic verification of requirements in VRS system
VRS (Verification Requirements Specifications) system is a tool for processing formal requirements during the initial stage of software, hardware, or system development. Symbolic modeling and deductive methods are used for detection of issues such as safety violations, deadlocks, nondeterminism, or livelocks. The formal representation of requirements also supports the generation of test suites as well as the synthesis of a design model.
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