具有统计精度保证的FPGA高斯随机数发生器

David B. Thomas
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引用次数: 12

摘要

许多类型的随机算法,如蒙特卡罗模拟和误码率测试,需要非常高的运行时间,并且通常是微不足道的并行性,因此是使用fpga执行的自然候选者。然而,应用程序依赖于具有良好统计特性的高斯随机数生成器(grng),因为对数万亿随机样本的非常小的偏差可能导致不正确的结果。以前的硬件grng专注于在理想假设下产生高斯分布的面积效率算法,但没有对来自真实定点硬件的实际分布做出陈述。在本文中,我们提出了一种新的GRNG,称为分段- clt,它使用许多小平滑分布的加权混合来近似高斯分布。通过调整权重,可以直接针对高斯分布,从而使电路具有精确量化的输出分布。介绍了PwCLT家族的三个成员,从具有良好质量的中等区域到提供保证统计精度达到12西格玛的发生器。我们还表明,与所有现有的高速标量FPGA grng相比,PwCLT提供了更好的面积精度权衡,并且可以提供以往任何方法都无法实现的极高水平的统计质量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
FPGA Gaussian Random Number Generators with Guaranteed Statistical Accuracy
Many types of stochastic algorithms, such as Monte-Carlo simulations and Bit-Error-Rate testing, require very high run-times and are often trivially parallelisable, so are natural candidates for execution using FPGAs. However, the applications are reliant on Gaussian Random Number Generators (GRNGs) with good statistical properties, as very small biases over trillions of random samples can lead to incorrect results. Previous hardware GRNGs have focussed on area-efficient algorithms to produce Gaussian distributions under idealised assumptions, but do not make statements about the actual distribution coming out of real fixed-point hardware. In this paper, we present a new type of GRNG called a Piecewise-CLT, which uses a weighted blend of many small smooth distributions to approximate the Gaussian. By adjusting the weights, it is possible to directly target the distribution of the Gaussian, resulting in a circuit with an exactly quantified output distribution. Three members of the PwCLT family are presented, ranging from medium-area with good quality, up to a generator providing guaranteed statistical accuracy out to 12-sigma. We also show that PwCLT provides a better area-accuracy tradeoff than all existing high-speed scalar FPGA GRNGs, and can provide extremely high levels of statistical quality not possible in any previous methods.
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