{"title":"自校准混合模拟CMOS共址干扰消除器","authors":"F. Kub, E. Justh, B. Lippard","doi":"10.1109/MILCOM.1999.821363","DOIUrl":null,"url":null,"abstract":"A continuous-time analog CMOS adaptive processor circuit is combined with high-power linear attenuators to implement a self-calibrating co-site interference canceller that achieves >40 dB cancellation for a +14 dBm interference level over a 30-88 MHz band. The analog CMOS adaptive processor implements the least mean square (LMS) error learning algorithm. A CMOS interference canceller is also demonstrated that is capable of cancelling multiple interfering signals simultaneously. The multiple interference CMOS co-site canceller demonstrated a frequency of operation of 80 MHz, an adaptivity of 60 dB, a minimum notch width of 25 kHz, a minimum adapt time constant of 25 /spl mu/s, and the simultaneous cancellation of two CW interferers.","PeriodicalId":334957,"journal":{"name":"MILCOM 1999. IEEE Military Communications. Conference Proceedings (Cat. No.99CH36341)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Self-calibrating hybrid analog CMOS co-site interference canceller\",\"authors\":\"F. Kub, E. Justh, B. Lippard\",\"doi\":\"10.1109/MILCOM.1999.821363\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A continuous-time analog CMOS adaptive processor circuit is combined with high-power linear attenuators to implement a self-calibrating co-site interference canceller that achieves >40 dB cancellation for a +14 dBm interference level over a 30-88 MHz band. The analog CMOS adaptive processor implements the least mean square (LMS) error learning algorithm. A CMOS interference canceller is also demonstrated that is capable of cancelling multiple interfering signals simultaneously. The multiple interference CMOS co-site canceller demonstrated a frequency of operation of 80 MHz, an adaptivity of 60 dB, a minimum notch width of 25 kHz, a minimum adapt time constant of 25 /spl mu/s, and the simultaneous cancellation of two CW interferers.\",\"PeriodicalId\":334957,\"journal\":{\"name\":\"MILCOM 1999. IEEE Military Communications. Conference Proceedings (Cat. No.99CH36341)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MILCOM 1999. IEEE Military Communications. Conference Proceedings (Cat. No.99CH36341)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MILCOM.1999.821363\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MILCOM 1999. IEEE Military Communications. Conference Proceedings (Cat. No.99CH36341)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MILCOM.1999.821363","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Self-calibrating hybrid analog CMOS co-site interference canceller
A continuous-time analog CMOS adaptive processor circuit is combined with high-power linear attenuators to implement a self-calibrating co-site interference canceller that achieves >40 dB cancellation for a +14 dBm interference level over a 30-88 MHz band. The analog CMOS adaptive processor implements the least mean square (LMS) error learning algorithm. A CMOS interference canceller is also demonstrated that is capable of cancelling multiple interfering signals simultaneously. The multiple interference CMOS co-site canceller demonstrated a frequency of operation of 80 MHz, an adaptivity of 60 dB, a minimum notch width of 25 kHz, a minimum adapt time constant of 25 /spl mu/s, and the simultaneous cancellation of two CW interferers.