自校准混合模拟CMOS共址干扰消除器

F. Kub, E. Justh, B. Lippard
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引用次数: 3

摘要

连续模拟CMOS自适应处理器电路与大功率线性衰减器相结合,实现了自校准的共站点干扰消除器,在30-88 MHz频段内实现了+14 dBm干扰水平的>40 dB消除。模拟CMOS自适应处理器实现了最小均方误差学习算法。还演示了一种能够同时消除多个干扰信号的CMOS干扰消除器。该多干扰CMOS共址消除器工作频率为80 MHz,自适应度为60 dB,最小陷波宽度为25 kHz,最小自适应时间常数为25 /spl mu/s,可同时消除两个连续波干扰。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Self-calibrating hybrid analog CMOS co-site interference canceller
A continuous-time analog CMOS adaptive processor circuit is combined with high-power linear attenuators to implement a self-calibrating co-site interference canceller that achieves >40 dB cancellation for a +14 dBm interference level over a 30-88 MHz band. The analog CMOS adaptive processor implements the least mean square (LMS) error learning algorithm. A CMOS interference canceller is also demonstrated that is capable of cancelling multiple interfering signals simultaneously. The multiple interference CMOS co-site canceller demonstrated a frequency of operation of 80 MHz, an adaptivity of 60 dB, a minimum notch width of 25 kHz, a minimum adapt time constant of 25 /spl mu/s, and the simultaneous cancellation of two CW interferers.
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