Rambus内存系统

Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing Pub Date : 1995-08-07 DOI:10.1109/MTDT.1995.518088

J.A. Gasbarro

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引用次数: 9

摘要

本文描述了一种革命性的新技术，用于构建运行速度比传统系统快10倍的高性能DRAM存储系统。只有9位宽的接口，设备能够以每秒500兆字节的速度传输数据。该技术采用标准CMOS工艺、封装和印刷电路制造技术实现，适用于成本敏感的批量应用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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The Rambus memory system

This paper describes a revolutionary new technology for building high-performance DRAM memory systems that operate up to 10 times faster than conventional systems. With only a 9-bit wide interface, devices are capable of transferring data at over 500 MBytes per second. This technology is implemented using standard CMOS process, packaging and printed circuit fabrication techniques, and is suitable for cost-sensitive volume applications.

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Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing

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