S. Sidiropoulos, N. Acharya, P. Chau, J. Dao, A. Feldman, H. Liaw, M. Loinaz, R. Narayanaswami, C. Portmann, S. Rabii, A. Salleh, S. Sheth, L. Thon, K. Vleugels, P. Yue, D. Stark
{"title":"一个800 mW的10 Gb以太网收发器,0.13 /spl mu/m CMOS","authors":"S. Sidiropoulos, N. Acharya, P. Chau, J. Dao, A. Feldman, H. Liaw, M. Loinaz, R. Narayanaswami, C. Portmann, S. Rabii, A. Salleh, S. Sheth, L. Thon, K. Vleugels, P. Yue, D. Stark","doi":"10.1109/ISSCC.2004.1332647","DOIUrl":null,"url":null,"abstract":"A fully integrated 10 Gb Ethernet transceiver IC using a standard 0.13 /spl mu/m CMOS process integrates 10.3 Gb/s and 4/spl times/3.12 Gb/s analog front-ends, with Layer-1 coding and management functionality. The 2.5/spl times/5 mm/sup 2/ IC exceeds both 10GE and SONET specifications, and dissipates 800 mW from its 1.2/2.5 V supplies.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"An 800 mW 10 Gb Ethernet transceiver in 0.13 /spl mu/m CMOS\",\"authors\":\"S. Sidiropoulos, N. Acharya, P. Chau, J. Dao, A. Feldman, H. Liaw, M. Loinaz, R. Narayanaswami, C. Portmann, S. Rabii, A. Salleh, S. Sheth, L. Thon, K. Vleugels, P. Yue, D. Stark\",\"doi\":\"10.1109/ISSCC.2004.1332647\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully integrated 10 Gb Ethernet transceiver IC using a standard 0.13 /spl mu/m CMOS process integrates 10.3 Gb/s and 4/spl times/3.12 Gb/s analog front-ends, with Layer-1 coding and management functionality. The 2.5/spl times/5 mm/sup 2/ IC exceeds both 10GE and SONET specifications, and dissipates 800 mW from its 1.2/2.5 V supplies.\",\"PeriodicalId\":273317,\"journal\":{\"name\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2004.1332647\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332647","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 800 mW 10 Gb Ethernet transceiver in 0.13 /spl mu/m CMOS
A fully integrated 10 Gb Ethernet transceiver IC using a standard 0.13 /spl mu/m CMOS process integrates 10.3 Gb/s and 4/spl times/3.12 Gb/s analog front-ends, with Layer-1 coding and management functionality. The 2.5/spl times/5 mm/sup 2/ IC exceeds both 10GE and SONET specifications, and dissipates 800 mW from its 1.2/2.5 V supplies.