可靠性分析:环境配置的性能评估

P. Vanhairoaert, R. Leveugle, P. Roche
{"title":"可靠性分析:环境配置的性能评估","authors":"P. Vanhairoaert, R. Leveugle, P. Roche","doi":"10.1109/DTIS.2006.1708652","DOIUrl":null,"url":null,"abstract":"Prototyping-based fault injection environments are employed to perform dependability analysis and thus predict the behavior of circuits in presence of faults. A novel environment has been recently proposed to perform several types of dependability analyses in a common optimized framework. The approach takes advantage of hardware speed and of software flexibility to achieve optimized trade-offs between experiment duration and processing complexity. This paper discusses the possible repartition of tasks between hardware and embedded software with respect to the type of circuit to analyze and to the instrumentation achieved. The performances of the approach are evaluated for each configuration of the environment","PeriodicalId":399250,"journal":{"name":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dependability analysis: performance evaluation of environment configurations\",\"authors\":\"P. Vanhairoaert, R. Leveugle, P. Roche\",\"doi\":\"10.1109/DTIS.2006.1708652\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Prototyping-based fault injection environments are employed to perform dependability analysis and thus predict the behavior of circuits in presence of faults. A novel environment has been recently proposed to perform several types of dependability analyses in a common optimized framework. The approach takes advantage of hardware speed and of software flexibility to achieve optimized trade-offs between experiment duration and processing complexity. This paper discusses the possible repartition of tasks between hardware and embedded software with respect to the type of circuit to analyze and to the instrumentation achieved. The performances of the approach are evaluated for each configuration of the environment\",\"PeriodicalId\":399250,\"journal\":{\"name\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS.2006.1708652\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2006.1708652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

采用基于原型的故障注入环境进行可靠性分析,从而预测存在故障时电路的行为。最近提出了一种新的环境,在一个通用的优化框架中执行几种类型的可靠性分析。该方法利用硬件速度和软件灵活性,在实验持续时间和处理复杂性之间实现优化权衡。本文从要分析的电路类型和所实现的仪器等方面讨论了硬件和嵌入式软件之间可能的任务重划分。针对环境的每个配置评估了该方法的性能
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Dependability analysis: performance evaluation of environment configurations
Prototyping-based fault injection environments are employed to perform dependability analysis and thus predict the behavior of circuits in presence of faults. A novel environment has been recently proposed to perform several types of dependability analyses in a common optimized framework. The approach takes advantage of hardware speed and of software flexibility to achieve optimized trade-offs between experiment duration and processing complexity. This paper discusses the possible repartition of tasks between hardware and embedded software with respect to the type of circuit to analyze and to the instrumentation achieved. The performances of the approach are evaluated for each configuration of the environment
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