Low-phase-noise eight-phase VCO using bottom series coupling technique

This paper presents an eight-phase low-phase-noise VCO using series coupling technique, which obtains less phase error compared to the parallel coupling. Furthermore, the bottom-series coupling is used to achieve better phase noise than the top-series coupling. To properly design the complementary cross-coupling pair, the impedance locus theory is adopted. The chip is implemented in 180 nm CMOS technonlogy and has a chip area of 1.88 mm2. Measured oscillation frequency is from 1.51 GHz to 1.99 GHz (27.4 %). Measured minimum phase noise is −129.23 dBc/Hz at 1MHz offset at 1.51GHz leading to a FOMt of −189.0. The measured worst phase deviation is less than ±3.6° and the core power dissipation is 18mW from a supply voltage of 1.8 V.