在ArchC中实现可参数化周期精确的ISS

ACS/IEEE International Conference on Computer Systems and Applications - AICCSA 2010 Pub Date : 2010-05-16 DOI:10.1109/AICCSA.2010.5586945

C. Bechara, N. Ventroux, D. Etiemble

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引用次数: 7

摘要

随着MP-SoC架构设计复杂性的增加，灵活准确的处理器模拟器成为探索广阔设计空间解决方案的必要条件。本文提出了一种基于archc2.0语言的柔性周期精确ISS模型。该模型可以具有可变的管道深度，并且可以轻松集成到基于SystemC的任何SoC设计中。它的性能和能力通过运行MiBench嵌入式基准套件来证明，同时提取每个应用程序的管道统计数据。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Towards a parameterizable cycle-accurate ISS in ArchC

With the increase in the design complexity of MP-SoC architectures, flexible and accurate processor simulators became a necessity for exploring the vast design space solutions. In this paper, we present a flexible cycle-accurate ISS model based on ArchC 2.0 language. The model can have a variable pipeline depth and can be integrated easily in any SoC design based on SystemC. Its performance and capabilities are demonstrated by running MiBench embedded benchmark suite, while extracting pipeline statistics for each application.

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ACS/IEEE International Conference on Computer Systems and Applications - AICCSA 2010

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