Haolu Xie, S. Fan, Xin Wang, Albert Z. H. Wang, Zhihua Wang, Hongyi Chen
{"title":"基于0.18μm SiGe BiCMOS的脉冲全频带超宽带收发器SoC","authors":"Haolu Xie, S. Fan, Xin Wang, Albert Z. H. Wang, Zhihua Wang, Hongyi Chen","doi":"10.1109/SOCC.2006.283847","DOIUrl":null,"url":null,"abstract":"In this paper, a single-chip pulse-based, non- carrier, full-band, low power ultra wideband (UWB) transceiver system-on-a-chip (SoC) for high data rate wireless video/audio/multimedia streaming applications is presented. This UWB SoC features a single full-band (7.5 GHz bandwidth from 3.1 GHz to 10.6 GHz), pulse-based non-carrier architecture to achieve high throughput (>100 Mbps) and high simplicity. It consists of low-noise amplifier (LNA), correlator, integrator, pulse generator, power switches and timing controller. This digital-ready UWB SoC features an on-chip analog-to-digital converter (ADC). The SoC uses BPSK modulation, Gaussian pulsing, and a global switching technique for power reduction. As the result, the average power consumption of the transceiver (no ADC) is 6 mW only. The SoC is designed in a commercial 0.18 mum SiGe BiCMOS technology.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A Pulse-Based Full-Band UWB Transceiver SoC in 0.18μm SiGe BiCMOS\",\"authors\":\"Haolu Xie, S. Fan, Xin Wang, Albert Z. H. Wang, Zhihua Wang, Hongyi Chen\",\"doi\":\"10.1109/SOCC.2006.283847\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a single-chip pulse-based, non- carrier, full-band, low power ultra wideband (UWB) transceiver system-on-a-chip (SoC) for high data rate wireless video/audio/multimedia streaming applications is presented. This UWB SoC features a single full-band (7.5 GHz bandwidth from 3.1 GHz to 10.6 GHz), pulse-based non-carrier architecture to achieve high throughput (>100 Mbps) and high simplicity. It consists of low-noise amplifier (LNA), correlator, integrator, pulse generator, power switches and timing controller. This digital-ready UWB SoC features an on-chip analog-to-digital converter (ADC). The SoC uses BPSK modulation, Gaussian pulsing, and a global switching technique for power reduction. As the result, the average power consumption of the transceiver (no ADC) is 6 mW only. The SoC is designed in a commercial 0.18 mum SiGe BiCMOS technology.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283847\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283847","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Pulse-Based Full-Band UWB Transceiver SoC in 0.18μm SiGe BiCMOS
In this paper, a single-chip pulse-based, non- carrier, full-band, low power ultra wideband (UWB) transceiver system-on-a-chip (SoC) for high data rate wireless video/audio/multimedia streaming applications is presented. This UWB SoC features a single full-band (7.5 GHz bandwidth from 3.1 GHz to 10.6 GHz), pulse-based non-carrier architecture to achieve high throughput (>100 Mbps) and high simplicity. It consists of low-noise amplifier (LNA), correlator, integrator, pulse generator, power switches and timing controller. This digital-ready UWB SoC features an on-chip analog-to-digital converter (ADC). The SoC uses BPSK modulation, Gaussian pulsing, and a global switching technique for power reduction. As the result, the average power consumption of the transceiver (no ADC) is 6 mW only. The SoC is designed in a commercial 0.18 mum SiGe BiCMOS technology.