{"title":"用于 802.15.4 标准低成本数字无线通信的 2.4 GHz 射频 CMOS 接收器","authors":"M. Egels, J. Gaubert, P. Pannier, G. Bas","doi":"10.1109/ICM.2004.1434272","DOIUrl":null,"url":null,"abstract":"Feasibility of 2.4 GHz RF CMOS receiver for low cost digital wireless communication for the 802.15.4 standard is demonstrated. The LNA, switch, and mixer architecture and design are described in the context of low cost and low power CMOS integrated circuits. Simulations with 0.28 /spl mu/m design kit shown 5 dB noise figure and 36 dB voltage gain for less than 30 mW power consumption. Additional considerations based on EM simulations to minimize substrate coupling and to avoid high frequency parasitic effects are also presented.","PeriodicalId":359193,"journal":{"name":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 2.4 GHz RF CMOS receiver for low cost digital wireless communication for 802.15.4 standard\",\"authors\":\"M. Egels, J. Gaubert, P. Pannier, G. Bas\",\"doi\":\"10.1109/ICM.2004.1434272\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Feasibility of 2.4 GHz RF CMOS receiver for low cost digital wireless communication for the 802.15.4 standard is demonstrated. The LNA, switch, and mixer architecture and design are described in the context of low cost and low power CMOS integrated circuits. Simulations with 0.28 /spl mu/m design kit shown 5 dB noise figure and 36 dB voltage gain for less than 30 mW power consumption. Additional considerations based on EM simulations to minimize substrate coupling and to avoid high frequency parasitic effects are also presented.\",\"PeriodicalId\":359193,\"journal\":{\"name\":\"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.\",\"volume\":\"56 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-12-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2004.1434272\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2004.1434272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 2.4 GHz RF CMOS receiver for low cost digital wireless communication for 802.15.4 standard
Feasibility of 2.4 GHz RF CMOS receiver for low cost digital wireless communication for the 802.15.4 standard is demonstrated. The LNA, switch, and mixer architecture and design are described in the context of low cost and low power CMOS integrated circuits. Simulations with 0.28 /spl mu/m design kit shown 5 dB noise figure and 36 dB voltage gain for less than 30 mW power consumption. Additional considerations based on EM simulations to minimize substrate coupling and to avoid high frequency parasitic effects are also presented.