基于非标度CMOS的低压功率放大器

2013 13th International Symposium on Communications and Information Technologies (ISCIT) Pub Date : 2013-10-24 DOI:10.1109/ISCIT.2013.6645940

P. Suebsombut, Pattarakamon Rangsee, R. Chaisricharoen

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引用次数: 0

摘要

本文设计并仿真了基于纳米级CMOS的低压功率放大器。功率放大器在90 nm射频CMOS晶体管上采用二级级联放大器设计。第一级是差分放大器，用于放大第一级放大器的两个输入之间的信号，第二级是普通漏极放大器，用于产生低功率到功率放大器。由于采用CMOS技术，该放大器的设计尺寸更小。本功率放大器采用低电压(1.5 V)，以节省放大器的功耗。该功率放大器在2.45 GHz时的输出增益为23 dB。该功率放大器在2.45 GHz时的输出功率为34.3 dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low voltage power amplifier based on nonoscale CMOS

The low voltage power amplifier based on nanoscale CMOS has been designed and simulated in this paper. The power amplifier has designed by 2 stages cascade amplifier on 90 nm RF CMOS transistor. The first stage is the differential amplifier to amplify the signal between two inputs of the first amplifier and the second stage is the common drain amplifier to generate low power to power amplifier. This amplifier is designed for a smaller dimension due to CMOS technology. This power amplifier uses low voltage (1.5 V) to conserve the power consumption of amplifier. The output gain of this power amplifier is 23 dB at 2.45 GHz. The output power of this power amplifier is 34.3 dB at 2.45 GHz.

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2013 13th International Symposium on Communications and Information Technologies (ISCIT)

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