{"title":"非常高速的里德-所罗门解码器","authors":"D. Sarwate, Naresh R Shanbhag","doi":"10.1109/ISIT.2000.866717","DOIUrl":null,"url":null,"abstract":"A pipelined finite-field multiplier structure in conjunction with a single systolic array implementation of the Berlekamp-Massey algorithm leads to a highly parallel decoder architecture in which the critical path delay is an order of magnitude smaller than the path delays of conventional architectures.","PeriodicalId":108752,"journal":{"name":"2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Very high-speed Reed-Solomon decoders\",\"authors\":\"D. Sarwate, Naresh R Shanbhag\",\"doi\":\"10.1109/ISIT.2000.866717\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A pipelined finite-field multiplier structure in conjunction with a single systolic array implementation of the Berlekamp-Massey algorithm leads to a highly parallel decoder architecture in which the critical path delay is an order of magnitude smaller than the path delays of conventional architectures.\",\"PeriodicalId\":108752,\"journal\":{\"name\":\"2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISIT.2000.866717\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIT.2000.866717","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A pipelined finite-field multiplier structure in conjunction with a single systolic array implementation of the Berlekamp-Massey algorithm leads to a highly parallel decoder architecture in which the critical path delay is an order of magnitude smaller than the path delays of conventional architectures.
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