用于10gb /s传输标签信号系统的敏感频率解调器方案

N. Koda, Kosuke Furuichi, H. Uemura, H. Inaba, K. Kishine
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引用次数: 0

摘要

在本文中,我们提出了一种频率解调电路,用于实现多路通信,称为“标记信号系统”。所提出的电路结构由延时电路和逻辑电路组成。在这项工作中,用离散器件设计的频率解调器通过FPGA检测信息。与传统的延迟检测电路相比,该电路成功地增加了电压随频移的变化。实验结果也证实了它的工作特性和优点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Proposal for sensitive frequency demodulator for 10-Gb/s transmission labeling signal system
In this paper, we propose a frequency demodulation circuit for realizing multiplex communication called a "labeling signal system." The proposed circuit configuration consists of delay circuits and logic circuits. In this work, a frequency demodulator designed with discrete devices detects information with an FPGA. Compared with the conventional delay detection circuit, the proposed circuit successfully increased the voltage change in accordance with the frequency shift. We also confirm its operating characteristics and advantages from the experimental results.
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