N. Koda, Kosuke Furuichi, H. Uemura, H. Inaba, K. Kishine
{"title":"用于10gb /s传输标签信号系统的敏感频率解调器方案","authors":"N. Koda, Kosuke Furuichi, H. Uemura, H. Inaba, K. Kishine","doi":"10.1109/ISOCC.2016.7799771","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a frequency demodulation circuit for realizing multiplex communication called a \"labeling signal system.\" The proposed circuit configuration consists of delay circuits and logic circuits. In this work, a frequency demodulator designed with discrete devices detects information with an FPGA. Compared with the conventional delay detection circuit, the proposed circuit successfully increased the voltage change in accordance with the frequency shift. We also confirm its operating characteristics and advantages from the experimental results.","PeriodicalId":278207,"journal":{"name":"2016 International SoC Design Conference (ISOCC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Proposal for sensitive frequency demodulator for 10-Gb/s transmission labeling signal system\",\"authors\":\"N. Koda, Kosuke Furuichi, H. Uemura, H. Inaba, K. Kishine\",\"doi\":\"10.1109/ISOCC.2016.7799771\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a frequency demodulation circuit for realizing multiplex communication called a \\\"labeling signal system.\\\" The proposed circuit configuration consists of delay circuits and logic circuits. In this work, a frequency demodulator designed with discrete devices detects information with an FPGA. Compared with the conventional delay detection circuit, the proposed circuit successfully increased the voltage change in accordance with the frequency shift. We also confirm its operating characteristics and advantages from the experimental results.\",\"PeriodicalId\":278207,\"journal\":{\"name\":\"2016 International SoC Design Conference (ISOCC)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International SoC Design Conference (ISOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISOCC.2016.7799771\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC.2016.7799771","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Proposal for sensitive frequency demodulator for 10-Gb/s transmission labeling signal system
In this paper, we propose a frequency demodulation circuit for realizing multiplex communication called a "labeling signal system." The proposed circuit configuration consists of delay circuits and logic circuits. In this work, a frequency demodulator designed with discrete devices detects information with an FPGA. Compared with the conventional delay detection circuit, the proposed circuit successfully increased the voltage change in accordance with the frequency shift. We also confirm its operating characteristics and advantages from the experimental results.