{"title":"基于双NiosII软核的SINS/GPS组合导航系统设计","authors":"Zhi Chai, Lingjuan Miao, Jun Shen","doi":"10.1109/ICACI.2012.6463151","DOIUrl":null,"url":null,"abstract":"As an advanced integrated navigation system with excellent performance, the SINS/GPS system combines the advantages of strap-down inertial navigation system (SINS) and global positioning system (GPS) respectively. A new architecture of the SINS/GPS system is implemented on SOPC platform with dual NiosII soft-core, which is proposed as an alternative of the conventional implementation with FPGA plus DSP. The two NiosII soft-core, One CPU core is utilized for the central control, data acquisition and off-chip communication with the host computer, another core is for the implementation of real-time navigation. Moreover, the Kaiman filter is implemented as a specific IP embedded into the on-chip system, which possesses a higher efficiency than the conventional method by using C program on DSP. As a hardware filter, it's independent of NiosII. The experimental results show both excellent efficiency and real-time quality of the implemented system. Consequently, the proposed architecture with conspicuous advantages is more feasible and has a reduced resource usage, compared with the conventional method.","PeriodicalId":404759,"journal":{"name":"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of SINS/GPS integrated navigation system based on dual NiosII soft-core\",\"authors\":\"Zhi Chai, Lingjuan Miao, Jun Shen\",\"doi\":\"10.1109/ICACI.2012.6463151\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As an advanced integrated navigation system with excellent performance, the SINS/GPS system combines the advantages of strap-down inertial navigation system (SINS) and global positioning system (GPS) respectively. A new architecture of the SINS/GPS system is implemented on SOPC platform with dual NiosII soft-core, which is proposed as an alternative of the conventional implementation with FPGA plus DSP. The two NiosII soft-core, One CPU core is utilized for the central control, data acquisition and off-chip communication with the host computer, another core is for the implementation of real-time navigation. Moreover, the Kaiman filter is implemented as a specific IP embedded into the on-chip system, which possesses a higher efficiency than the conventional method by using C program on DSP. As a hardware filter, it's independent of NiosII. The experimental results show both excellent efficiency and real-time quality of the implemented system. Consequently, the proposed architecture with conspicuous advantages is more feasible and has a reduced resource usage, compared with the conventional method.\",\"PeriodicalId\":404759,\"journal\":{\"name\":\"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICACI.2012.6463151\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Fifth International Conference on Advanced Computational Intelligence (ICACI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICACI.2012.6463151","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of SINS/GPS integrated navigation system based on dual NiosII soft-core
As an advanced integrated navigation system with excellent performance, the SINS/GPS system combines the advantages of strap-down inertial navigation system (SINS) and global positioning system (GPS) respectively. A new architecture of the SINS/GPS system is implemented on SOPC platform with dual NiosII soft-core, which is proposed as an alternative of the conventional implementation with FPGA plus DSP. The two NiosII soft-core, One CPU core is utilized for the central control, data acquisition and off-chip communication with the host computer, another core is for the implementation of real-time navigation. Moreover, the Kaiman filter is implemented as a specific IP embedded into the on-chip system, which possesses a higher efficiency than the conventional method by using C program on DSP. As a hardware filter, it's independent of NiosII. The experimental results show both excellent efficiency and real-time quality of the implemented system. Consequently, the proposed architecture with conspicuous advantages is more feasible and has a reduced resource usage, compared with the conventional method.