{"title":"改进补偿锐化CIC抽取滤波器的特性","authors":"G. Dolecek","doi":"10.1109/GC-ElecEng52322.2021.9788139","DOIUrl":null,"url":null,"abstract":"This paper presents a novel method to improve aliasing rejection and decrease complexity in the compensated sharpened cascaded-integrated-comb (CIC) decimation filters, considering that the overal decimation factor can be presented as a product of two integers. Two-stage decimation structure is proposed. In the first stage is a CIC filter decimated by the first decimation factor, while in the second stage is the sharpened CIC filter decimated by the second decimation factor. The complexity is expressed in terms of the numbers of adders per output samples (APOS). There is a trade-off between the increasing the aliasing rejection and the complexity decreasing, in the proposed structure. The compensator is designed using particle swarm optimization (PSO) and works at low rate i.e. after decimation. The sharpening polynomials are used from literature. The method is ilustrated with examples. The comparisons with the state of the art show the advantages of the proposed method.","PeriodicalId":344268,"journal":{"name":"2021 Global Congress on Electrical Engineering (GC-ElecEng)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Improving Characteristics of Compensated Sharpened CIC Decimation Filters\",\"authors\":\"G. Dolecek\",\"doi\":\"10.1109/GC-ElecEng52322.2021.9788139\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel method to improve aliasing rejection and decrease complexity in the compensated sharpened cascaded-integrated-comb (CIC) decimation filters, considering that the overal decimation factor can be presented as a product of two integers. Two-stage decimation structure is proposed. In the first stage is a CIC filter decimated by the first decimation factor, while in the second stage is the sharpened CIC filter decimated by the second decimation factor. The complexity is expressed in terms of the numbers of adders per output samples (APOS). There is a trade-off between the increasing the aliasing rejection and the complexity decreasing, in the proposed structure. The compensator is designed using particle swarm optimization (PSO) and works at low rate i.e. after decimation. The sharpening polynomials are used from literature. The method is ilustrated with examples. The comparisons with the state of the art show the advantages of the proposed method.\",\"PeriodicalId\":344268,\"journal\":{\"name\":\"2021 Global Congress on Electrical Engineering (GC-ElecEng)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Global Congress on Electrical Engineering (GC-ElecEng)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GC-ElecEng52322.2021.9788139\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Global Congress on Electrical Engineering (GC-ElecEng)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GC-ElecEng52322.2021.9788139","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Improving Characteristics of Compensated Sharpened CIC Decimation Filters
This paper presents a novel method to improve aliasing rejection and decrease complexity in the compensated sharpened cascaded-integrated-comb (CIC) decimation filters, considering that the overal decimation factor can be presented as a product of two integers. Two-stage decimation structure is proposed. In the first stage is a CIC filter decimated by the first decimation factor, while in the second stage is the sharpened CIC filter decimated by the second decimation factor. The complexity is expressed in terms of the numbers of adders per output samples (APOS). There is a trade-off between the increasing the aliasing rejection and the complexity decreasing, in the proposed structure. The compensator is designed using particle swarm optimization (PSO) and works at low rate i.e. after decimation. The sharpening polynomials are used from literature. The method is ilustrated with examples. The comparisons with the state of the art show the advantages of the proposed method.