J. Blanc, J. Bonaimé, E. Delevoye, J. Gautier, J. de Pontcharra, R. Truche, E. Dupont-Nivet, J.L. Martin, J. Montaron
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Development of a fully CMOS and bipolar compatible JFET process on SIMOX is reported. The main characteristics obtained on a two-junction-type JFET realized in 1- mu m silicon epitaxy on SOI material are presented. A mesa-structure has been chosen for lateral isolation. A deep junction is arsenic implanted before epitaxy at 1000 degrees C; the channel and drain/source doping levels are controlled by ion implantation; the upper junction is diffused from polysilicon. Radiation dose, neutron fluence, and photocurrent effects are described.<>
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