{"title":"三维集成电路中功率分布对微通道散热效率的影响分析","authors":"P. Zając, C. Maj, A. Napieralski","doi":"10.1109/THERMINIC.2016.7749033","DOIUrl":null,"url":null,"abstract":"Liquid microchannel cooling of 3D ICs is a very attractive idea which could help solving the problem of ever-increasing power dissipation due to its good cooling efficiency and potential scalability. However, this cooling method has some very different properties than the well-understood forced air convection. In particular, its cooling efficiency with respect to power variations in the chip is still not completely analysed. Therefore, in this paper a thorough study of microchannel cooling efficiency as a function of intra- and interlayer power consumption variation is presented. We use a finite element method analysis to run a coupled thermo-fluidic simulation of a dedicated 3D chip model. We show that the placement of chip units with respect to microchannels can significantly influence the peak chip temperature. In particular, for a 3D chip including Intel's i7-6950X 10-core processor, a temperature difference of nearly 9°C was observed.","PeriodicalId":143150,"journal":{"name":"2016 22nd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Analysis of the impact of power distribution on the efficiency of microchannel cooling in 3D ICs\",\"authors\":\"P. Zając, C. Maj, A. Napieralski\",\"doi\":\"10.1109/THERMINIC.2016.7749033\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Liquid microchannel cooling of 3D ICs is a very attractive idea which could help solving the problem of ever-increasing power dissipation due to its good cooling efficiency and potential scalability. However, this cooling method has some very different properties than the well-understood forced air convection. In particular, its cooling efficiency with respect to power variations in the chip is still not completely analysed. Therefore, in this paper a thorough study of microchannel cooling efficiency as a function of intra- and interlayer power consumption variation is presented. We use a finite element method analysis to run a coupled thermo-fluidic simulation of a dedicated 3D chip model. We show that the placement of chip units with respect to microchannels can significantly influence the peak chip temperature. In particular, for a 3D chip including Intel's i7-6950X 10-core processor, a temperature difference of nearly 9°C was observed.\",\"PeriodicalId\":143150,\"journal\":{\"name\":\"2016 22nd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)\",\"volume\":\"126 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 22nd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/THERMINIC.2016.7749033\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 22nd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/THERMINIC.2016.7749033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of the impact of power distribution on the efficiency of microchannel cooling in 3D ICs
Liquid microchannel cooling of 3D ICs is a very attractive idea which could help solving the problem of ever-increasing power dissipation due to its good cooling efficiency and potential scalability. However, this cooling method has some very different properties than the well-understood forced air convection. In particular, its cooling efficiency with respect to power variations in the chip is still not completely analysed. Therefore, in this paper a thorough study of microchannel cooling efficiency as a function of intra- and interlayer power consumption variation is presented. We use a finite element method analysis to run a coupled thermo-fluidic simulation of a dedicated 3D chip model. We show that the placement of chip units with respect to microchannels can significantly influence the peak chip temperature. In particular, for a 3D chip including Intel's i7-6950X 10-core processor, a temperature difference of nearly 9°C was observed.