A Distributed Platform for Integration of FPGA-based Embedded Systems

The challenge target by this work is to synchronize heterogeneous and distributed devices. For this purpose a middleware is presented as an infrastructure that facilitates sending and receiving messages among distributed and heterogeneous systems, called Virtual Bus. In order to improve the interoperabilty with legacy systems, it was developed using the IEEE 1516 standard (called HLA - High Level Architecture). As proof of concept experiment a version of MD5 (Message-Digest Algorithm 5) was implemented. This algorithm was processed in a PC, in FPGA and in an ARM processor, separately and joint in a unique environment integrated by Virtual Bus. The experiments demonstrated satisfactory results related to communication and performance.