J. Colinge, J. Kang, W. McFarland, C. Stout, R. Walker
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引用次数: 5

摘要

仅给出摘要形式,如下。采用1250℃退火的100 nm SIMOX(氧注入分离)薄膜,采用LOCOS(硅局部氧化)隔离,栅极氧化物厚度为22 nm,实现了高速CMOS逻辑电路。在n通道和p通道器件中,硼浓度分别为1E17和5E16 cm/sup -3/。由于没有使用硅化物,源和漏片电阻约为200欧米茄/平方算子。只使用了一层金属。由于在薄膜中没有观察到扭结,因此使用规则的nshort和pshort SPICE模型来模拟电路运行。在V/sub / dd =3.3 V条件下,获得了具有以下性能的电路:工作速度为1.4 Gb/s (50 mW)的2:1多路复用器,输出频率高达1.8 GHz (75 mW)的压控振荡器,以及上升和下降时间为250-ps的输出级(输出阻抗=25 ω)。输出电压摆幅为ECL,数据速率为312 Mb/s时的功耗为65 mW。制作了输入频率为2ghz、功耗为12mw的2:1分频器。仿真结果表明,采用硅化物可实现3 ghz的工作,采用双金属级电路可实现更高的速度性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Gigahertz CMOS/SIMOX circuits
Summary form only given, as follows. High-speed CMOS logic circuits have been realized in thin-film (100-nm) SIMOX (separation by implantation of oxygen) films annealed at 1250 degrees C. LOCOS (local oxidation of silicon) isolation was used, and the gate oxide thickness was 22 nm. Boron concentration was 1E17 and 5E16 cm/sup -3/ in n- and p-channel devices, respectively. Since no silicide was used, source and drain sheet resistance was about 200 Omega / Square Operator . Only one level of metal was used. Since no kink is observed in thin films, regular nshort and pshort SPICE models were used to simulate circuit operation. Circuits with the following performances were obtained at V/sub dd/=3.3 V: 2:1 multiplexer operating at 1.4 Gb/s (50 mW), voltage-controlled oscillator with an output frequency of up to 1.8 GHz (75 mW), and output stages with 250-ps rise and fall times (output impedance=25 Omega ). The output voltage swing is ECL, and a power dissipation of 65 mW is observed at a 312 Mb/s data rate. A 2:1 frequency divider operating with an input frequency of 2 GHz and dissipating 12 mW was fabricated. Simulation indicates 3-GHz operation if silicide is used and higher speed performance if the circuit is realized with two metal levels.<>
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