Accelerating CNN computation: quantisation tuning and network resizing

The interest in developing cognitive aware systems, specially for vision applications based on artificial neural networks, has grown exponentially in the last years. While high performance systems are key for the success of current Convolutional Neural Network (CNN) implementations, there is a trend to bring these capabilities to embedded real-time systems. This work contributes to tackle this challenge by exploring CNNs design space. Namely, it combines parameter quantisation techniques with a proposed set of CNN architectural transformations to reduce resource and execution time costs on Field Programmable Gate Array (FPGA) devices while maintaining high classification accuracy. An hardware mapping methodology is also proposed for deploying resource constrained CNNs into a reconfigurable platform for efficient algorithm acceleration. The proposed transformations reduce accuracy loss due to quantization by 44% in average. Also, analysis of the performance results obtained in a Central Processing Unit (CPU)+FPGA platform show up to 50% execution time reduction when compared with a state-of-the-art implementation.