{"title":"利用FPGA实现altera DE0套件上的PID控制PWM模块","authors":"R. Jain, M. Aware, A. Junghare","doi":"10.1109/CMI.2016.7413767","DOIUrl":null,"url":null,"abstract":"The main aim of this paper is to design PID control PWM module using field programmable gate array (FPGA) technology. FPGA based realization offers high speed, complex functionality, consume less power, and provides parallel processing. In this paper, we have implemented PID control PWM module on programmable logic design software Quartus II and verified on DE0 Nano Board (Cyclone IV FPGA family of company Altera). Signal Tap II analyzer and RTL viewer are used for analyzing and debugging the design. For Proper timing constraint and clock arrangement, Time Quest analyzer is used. The simulation and hardware results shows that implementation with FPGA has some advantages such as flexible design, high reliability and high speed.","PeriodicalId":244262,"journal":{"name":"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Implementation of a PID control PWM module on altera DE0 kit using FPGA\",\"authors\":\"R. Jain, M. Aware, A. Junghare\",\"doi\":\"10.1109/CMI.2016.7413767\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The main aim of this paper is to design PID control PWM module using field programmable gate array (FPGA) technology. FPGA based realization offers high speed, complex functionality, consume less power, and provides parallel processing. In this paper, we have implemented PID control PWM module on programmable logic design software Quartus II and verified on DE0 Nano Board (Cyclone IV FPGA family of company Altera). Signal Tap II analyzer and RTL viewer are used for analyzing and debugging the design. For Proper timing constraint and clock arrangement, Time Quest analyzer is used. The simulation and hardware results shows that implementation with FPGA has some advantages such as flexible design, high reliability and high speed.\",\"PeriodicalId\":244262,\"journal\":{\"name\":\"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)\",\"volume\":\"77 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-02-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CMI.2016.7413767\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMI.2016.7413767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
摘要
本文的主要目的是利用现场可编程门阵列(FPGA)技术设计PID控制PWM模块。基于FPGA的实现提供高速、复杂的功能、更低的功耗,并提供并行处理。本文在可编程逻辑设计软件Quartus II上实现了PID控制PWM模块,并在DE0纳米板(Altera公司的Cyclone IV FPGA系列)上进行了验证。采用Signal Tap II分析仪和RTL查看器对设计进行分析和调试。为了实现合理的时序约束和时钟安排,采用了Time Quest分析仪。仿真和硬件结果表明,采用FPGA实现具有设计灵活、可靠性高、速度快等优点。
Implementation of a PID control PWM module on altera DE0 kit using FPGA
The main aim of this paper is to design PID control PWM module using field programmable gate array (FPGA) technology. FPGA based realization offers high speed, complex functionality, consume less power, and provides parallel processing. In this paper, we have implemented PID control PWM module on programmable logic design software Quartus II and verified on DE0 Nano Board (Cyclone IV FPGA family of company Altera). Signal Tap II analyzer and RTL viewer are used for analyzing and debugging the design. For Proper timing constraint and clock arrangement, Time Quest analyzer is used. The simulation and hardware results shows that implementation with FPGA has some advantages such as flexible design, high reliability and high speed.