利用FPGA实现altera DE0套件上的PID控制PWM模块

R. Jain, M. Aware, A. Junghare
{"title":"利用FPGA实现altera DE0套件上的PID控制PWM模块","authors":"R. Jain, M. Aware, A. Junghare","doi":"10.1109/CMI.2016.7413767","DOIUrl":null,"url":null,"abstract":"The main aim of this paper is to design PID control PWM module using field programmable gate array (FPGA) technology. FPGA based realization offers high speed, complex functionality, consume less power, and provides parallel processing. In this paper, we have implemented PID control PWM module on programmable logic design software Quartus II and verified on DE0 Nano Board (Cyclone IV FPGA family of company Altera). Signal Tap II analyzer and RTL viewer are used for analyzing and debugging the design. For Proper timing constraint and clock arrangement, Time Quest analyzer is used. The simulation and hardware results shows that implementation with FPGA has some advantages such as flexible design, high reliability and high speed.","PeriodicalId":244262,"journal":{"name":"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Implementation of a PID control PWM module on altera DE0 kit using FPGA\",\"authors\":\"R. Jain, M. Aware, A. Junghare\",\"doi\":\"10.1109/CMI.2016.7413767\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The main aim of this paper is to design PID control PWM module using field programmable gate array (FPGA) technology. FPGA based realization offers high speed, complex functionality, consume less power, and provides parallel processing. In this paper, we have implemented PID control PWM module on programmable logic design software Quartus II and verified on DE0 Nano Board (Cyclone IV FPGA family of company Altera). Signal Tap II analyzer and RTL viewer are used for analyzing and debugging the design. For Proper timing constraint and clock arrangement, Time Quest analyzer is used. The simulation and hardware results shows that implementation with FPGA has some advantages such as flexible design, high reliability and high speed.\",\"PeriodicalId\":244262,\"journal\":{\"name\":\"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)\",\"volume\":\"77 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-02-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CMI.2016.7413767\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE First International Conference on Control, Measurement and Instrumentation (CMI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMI.2016.7413767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

摘要

本文的主要目的是利用现场可编程门阵列(FPGA)技术设计PID控制PWM模块。基于FPGA的实现提供高速、复杂的功能、更低的功耗,并提供并行处理。本文在可编程逻辑设计软件Quartus II上实现了PID控制PWM模块,并在DE0纳米板(Altera公司的Cyclone IV FPGA系列)上进行了验证。采用Signal Tap II分析仪和RTL查看器对设计进行分析和调试。为了实现合理的时序约束和时钟安排,采用了Time Quest分析仪。仿真和硬件结果表明,采用FPGA实现具有设计灵活、可靠性高、速度快等优点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Implementation of a PID control PWM module on altera DE0 kit using FPGA
The main aim of this paper is to design PID control PWM module using field programmable gate array (FPGA) technology. FPGA based realization offers high speed, complex functionality, consume less power, and provides parallel processing. In this paper, we have implemented PID control PWM module on programmable logic design software Quartus II and verified on DE0 Nano Board (Cyclone IV FPGA family of company Altera). Signal Tap II analyzer and RTL viewer are used for analyzing and debugging the design. For Proper timing constraint and clock arrangement, Time Quest analyzer is used. The simulation and hardware results shows that implementation with FPGA has some advantages such as flexible design, high reliability and high speed.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信