基于TSV的3D堆叠ic:机遇与挑战

IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems Pub Date : 2012-04-18 DOI:10.1109/DDECS.2012.6219008

S. Hamdioui

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引用次数: 0

摘要

业界正在为三维堆叠集成电路(3d - sic)做准备，通过硅通孔(tsv)垂直连接。3D-SIC是一项新兴技术，具有巨大的优势，如异构集成，性能更高，功耗更低，占地面积更小。然而，为了使3D集成成为一种可行的产品方法，必须解决许多挑战，包括设计，制造和测试。

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TSV based 3D stacked ICs: Opportunities and challenges

The industry is preparing itself for three-dimensional stacked ICs (3D-SICs), vertically interconnected by means of Through-Silicon Via's (TSVs). 3D-SIC is an emerging technology that promises huge advantages such as heterogeneous integration with higher performance and lower power dissipation at a smaller footprint. However, for 3D integration to become a viable product approach, many challenges have to be solved including design, manufacturing and test.

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IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems

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