Jaeyoung Ryu, Seung-Yong Cho, Jeongsu Lee, Jongjin Kim, Yeonwoo Ku, K. Kwon, Hyunkoo Kang
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Double quadrature harmonic rejection architecture insensitive to gain and phase mismatch for analog/digital TV tuner IC
Image rejection and harmonic rejection are important performance parameters in wideband low-IF TV system. In this paper, double quadrature harmonic rejection architecture insensitive to gain and/or phase mismatch is proposed to satisfy stringent image rejection ratio (IRR) and harmonic rejection ratio (HRR) for analog/digital TV tuner ICs. Fabricated in 0.13µm CMOS process, more than 60dB of the IRR is achieved over 42–864MHz RF frequency and more than 69dB of the 3rd HRR is achieved over 42–306MHz RF frequency without any calibration.
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