片上稳压模块(VRM)对高速输出缓冲器电源/地噪声和抖动的影响

Heegon Kim, Jingook Kim, B. Achkir, C. Yoon, J. Fan
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引用次数: 9

摘要

介绍了用于降低配电网电源/地噪声和抑制高速输出缓冲器抖动的片上稳压模块(VRM)。分析了片上VRM的基本拓扑结构和优化操作。带有片上VRM的PDN通过消除来自封装/PCB PDN的额外影响来降低功率/地噪声。此外,在高速输出缓冲区的PDN上实现片上VRM时,输出信号的抖动更小。采用110纳米CMOS技术库进行SPICE仿真,验证了片上VRM对PDN和抖动的改善。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
On-chip voltage regulator module (VRM) effect on power/ground noise and jitter at high-speed output buffer
On-chip voltage regulator module (VRM) for the reduction of power/ground noise on power distribution network (PDN) and jitter minimization at high-speed output buffer is introduced. The basic topology and optimized operation for on-chip VRM is analyzed. A PDN with on-chip VRM shows reduced power/ground noise through removing additional effects coming from package/PCB PDN. Also, when on-chip VRM is implemented on PDN of high-speed output buffers, jitter at output signal is lower. Improvements on PDN and jitter through on-chip VRM are shown and validated with SPICE simulation with 110nm CMOS technology library.
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