{"title":"容延迟组网","authors":"V. Cerf","doi":"10.1109/HOTI.2002.10009","DOIUrl":null,"url":null,"abstract":"The invention provides an electronic circuit, preferably in CMOS, for a keyboard switch matrix with only two pole switches and no interconnecting diodes. The column and row wires are each connected to ground via a resistor and to the supply voltage via an electronic switch and an inverter. The output of the row inverters are connected to a NAND gate which controls the electronic switches.","PeriodicalId":128992,"journal":{"name":"Hot Interconnects","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Delay Tolerant Networking\",\"authors\":\"V. Cerf\",\"doi\":\"10.1109/HOTI.2002.10009\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The invention provides an electronic circuit, preferably in CMOS, for a keyboard switch matrix with only two pole switches and no interconnecting diodes. The column and row wires are each connected to ground via a resistor and to the supply voltage via an electronic switch and an inverter. The output of the row inverters are connected to a NAND gate which controls the electronic switches.\",\"PeriodicalId\":128992,\"journal\":{\"name\":\"Hot Interconnects\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Hot Interconnects\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOTI.2002.10009\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Hot Interconnects","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTI.2002.10009","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The invention provides an electronic circuit, preferably in CMOS, for a keyboard switch matrix with only two pole switches and no interconnecting diodes. The column and row wires are each connected to ground via a resistor and to the supply voltage via an electronic switch and an inverter. The output of the row inverters are connected to a NAND gate which controls the electronic switches.