早期实时性能评估的主机编译多核系统仿真

Parisa Razaghi, A. Gerstlauer
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引用次数: 14

摘要

随着复杂性和软件内容的增加,现代嵌入式平台采用多核处理器和硬件加速器的异构组合,以便在有限的功率预算下提供高性能。为了评估实时性能和其他约束条件,全系统仿真是必不可少的。由于传统方法要么缓慢要么不准确,所谓的源级或主机编译模拟器最近出现,作为在早期设计阶段快速评估整个系统的解决方案。在这种方法中,通过抽象执行行为和增加模拟粒度来实现更快的模拟。然而,现有的源代码级模拟器通常只关注应用程序行为,而忽略了硬件/软件交互的影响及其相关的速度和准确性权衡。在本文中,我们介绍了一个主机编译的模拟器,它可以在全系统上下文中模拟软件的执行。我们的模拟器结合了实时操作系统(RTOSs)和多核处理器的抽象模型,以复制定时精确的硬件/软件交互,并实现完整的系统协同仿真。一种集成的自动定时粒度调整方法(ATGA)利用对系统状态的观察来自动控制定时模型并优化导航速度与精度条件。应用于工业级平台的结果证实,操作系统级和系统级效应会显著影响总体精度和仿真开销。通过提供仔细的抽象,我们的模型可以在超过1000 MIPS的等效速度下实现完整的系统模拟,并且定时误差小于3%。再加上能够轻松调整仿真参数和配置,这证明了我们的模拟器对早期应用程序开发和设计空间探索的好处。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation
With increasing complexity and software content, modern embedded platforms employ a heterogeneous mix of multicore processors along with hardware accelerators in order to provide high performance in limited power budgets. To evaluate real-time performance and other constraints, full system simulations are essential. With traditional approaches being either slow or inaccurate, so-called source-level or host-compiled simulators have recently emerged as a solution for rapid evaluation of the complete system at early design stages. In such approaches, a faster simulation is achieved by abstracting execution behavior and increasing simulation granularity. However, existing source-level simulators often focus on application behavior only while neglecting the effects of hardware/software interactions and their associated speed and accuracy trade-offs. In this article, we present a host-compiled simulator that emulates software execution in a full-system context. Our simulator incorporates abstract models of both real-time operating systems (RTOSs) and multicore processors to replicate timing-accurate hardware/software interactions and to enable full system cosimulation. An integrated approach for automatic timing granularity adjustment (ATGA) uses observations of the system state to automatically control the timing model and optimally navigate speed versus accuracy conditions. Results as applied to industrial-strength platforms confirm that OS- and system-level effects can significantly contribute to overall accuracy and simulation overhead. By providing careful abstractions, our models can achieve full system simulations at equivalent speeds of more than a thousand MIPS with less than 3% timing error. Coupled with the capability to easily adjust simulation parameters and configurations, this demonstrates the benefits of our simulator for early application development and design space exploration.
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