使用高级处理器模型的可重定向缓存仿真

Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001 Pub Date : 2001-01-29 DOI:10.1109/ACAC.2001.903371

Rajiv A. Ravindran, R. Moona

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引用次数: 4

摘要

在处理器设计期间，通常需要评估多个缓存配置。本文介绍了一种可重定向在线缓存模拟器的设计与实现。该缓存模拟器使用来自Sim-nML处理器描述语言的可重目标指令集模拟器实现。在实际处理器设计之前，可重定向性有助于缓存模拟和评估。

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Retargetable cache simulation using high level processor models

During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simulator. The cache simulator has been implemented using a retargetable instruction set simulator from the Sim-nML processor description language. The retargetability helps in cache simulation and evaluation much before the actual processor design.

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Proceedings 6th Australasian Computer Systems Architecture Conference. ACSAC 2001

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