{"title":"BIMOS交换级的交换行为","authors":"L. Lorenz, H. Amann","doi":"10.1109/PESC.1986.7415553","DOIUrl":null,"url":null,"abstract":"The switching behaviour of a BIMOS switching stage is investigated, taking into account the most important parasitic network and device parameters. Its short-circuit behaviour is also discussed and ways of improving it are presented. The power range is expanded by connecting power MOSFETs in parallel and extending the switching behaviour of the Darlington stage. The parallel-switching of FETs is also analysed. Possible ways of reducing dynamic and static losses are discussed in a power-loss treatment.","PeriodicalId":164857,"journal":{"name":"1986 17th Annual IEEE Power Electronics Specialists Conference","volume":"4 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1986-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Switching behaviour of a BIMOS switching stage\",\"authors\":\"L. Lorenz, H. Amann\",\"doi\":\"10.1109/PESC.1986.7415553\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The switching behaviour of a BIMOS switching stage is investigated, taking into account the most important parasitic network and device parameters. Its short-circuit behaviour is also discussed and ways of improving it are presented. The power range is expanded by connecting power MOSFETs in parallel and extending the switching behaviour of the Darlington stage. The parallel-switching of FETs is also analysed. Possible ways of reducing dynamic and static losses are discussed in a power-loss treatment.\",\"PeriodicalId\":164857,\"journal\":{\"name\":\"1986 17th Annual IEEE Power Electronics Specialists Conference\",\"volume\":\"4 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1986-06-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1986 17th Annual IEEE Power Electronics Specialists Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PESC.1986.7415553\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1986 17th Annual IEEE Power Electronics Specialists Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PESC.1986.7415553","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The switching behaviour of a BIMOS switching stage is investigated, taking into account the most important parasitic network and device parameters. Its short-circuit behaviour is also discussed and ways of improving it are presented. The power range is expanded by connecting power MOSFETs in parallel and extending the switching behaviour of the Darlington stage. The parallel-switching of FETs is also analysed. Possible ways of reducing dynamic and static losses are discussed in a power-loss treatment.