PECVD低k SiOC (k=2.8)作为使用多孔低k介电体(k=2.3)的200nm间距Cu互连的帽层

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) Pub Date : 2004-06-07 DOI:10.1109/IITC.2004.1345685

S. Lee, T. Yoshie, Y. Sudo, E. Soda, K. Yoneda, B. Yoon, H. Kabayashi, S. Kageyama, K. Misawa, S. Kondo, T. Nasuno, Y. Matsubara, N. Ohashi, N. Kobayashi

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引用次数: 5

摘要

本研究提出使用PECVD低k碳掺杂SiO2 (SiOC)作为使用高模量MSQ (k=2.3)的200nm间距Cu互连的帽层，以减少低k空隙的形成和有效介电常数(keff)。抑制孔隙的机制是由于SiOC膜对氟(F)的高渗透性，氟(F)在damascene蚀刻过程中加入到p-MSQ中。通过FIB分析和电学特性分析，证实了硅碳化合物盖层的应用可以消除空隙。采用SiOC帽层降低了200nm间距Cu/p-MSQ互连的keff值，与计算结果吻合较好。因此，该工艺有望为65nm及以上节点提供可靠的多孔超低k。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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PECVD low-k SiOC (k=2.8) as a cap layer for 200nm pitch Cu interconnect using porous low-k dielectrics (k=2.3)

This work proposes a use of PECVD low-k carbon-doped SiO2 (SiOC) as a cap layer for 200nm pitch Cu interconnects using high-modulus porous MSQ (k=2.3) to reduce the low-k void formation and the effective dielectric constant (keff). The mechanism of void suppression is due to the high permeability of SiOC film for fluorine (F), which is incorporated I p-MSQ during damascene etching. The elimination of voids by application of SiOC cap layer is confirmed by FIB analysis as well as the electrical characteristics. The keff value of 200nm pitch Cu/p-MSQ interconnects is reduced using SiOC cap layer, which is in good agreement with the calculation. Thus, this process is promising for the reliable porous ultra low-k for the 65nm node and beyond.

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Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)

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